1 /* 2 * Copyright (C) 2015 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX7D SABRESD board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __MX7D_SABRESD_CONFIG_H 10 #define __MX7D_SABRESD_CONFIG_H 11 12 #include "mx7_common.h" 13 14 #define CONFIG_DBG_MONITOR 15 #define PHYS_SDRAM_SIZE SZ_1G 16 17 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR 18 19 /* Size of malloc() pool */ 20 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) 21 22 /* Network */ 23 #define CONFIG_FEC_MXC 24 #define CONFIG_MII 25 #define CONFIG_FEC_XCV_TYPE RGMII 26 #define CONFIG_ETHPRIME "FEC" 27 #define CONFIG_FEC_MXC_PHYADDR 0 28 29 #define CONFIG_PHYLIB 30 #define CONFIG_PHY_BROADCOM 31 /* ENET1 */ 32 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR 33 34 /* MMC Config*/ 35 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 36 37 #undef CONFIG_BOOTM_NETBSD 38 #undef CONFIG_BOOTM_PLAN9 39 #undef CONFIG_BOOTM_RTEMS 40 41 /* I2C configs */ 42 #define CONFIG_SYS_I2C_MXC 43 #define CONFIG_SYS_I2C_SPEED 100000 44 45 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 46 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 47 48 #ifdef CONFIG_IMX_BOOTAUX 49 /* Set to QSPI1 A flash at default */ 50 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000 51 52 #define UPDATE_M4_ENV \ 53 "m4image=m4_qspi.bin\0" \ 54 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \ 55 "update_m4_from_sd=" \ 56 "if sf probe 0:0; then " \ 57 "if run loadm4image; then " \ 58 "setexpr fw_sz ${filesize} + 0xffff; " \ 59 "setexpr fw_sz ${fw_sz} / 0x10000; " \ 60 "setexpr fw_sz ${fw_sz} * 0x10000; " \ 61 "sf erase 0x0 ${fw_sz}; " \ 62 "sf write ${loadaddr} 0x0 ${filesize}; " \ 63 "fi; " \ 64 "fi\0" \ 65 "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" 66 #else 67 #define UPDATE_M4_ENV "" 68 #endif 69 70 #define CONFIG_MFG_ENV_SETTINGS \ 71 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ 72 "rdinit=/linuxrc " \ 73 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ 74 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ 75 "g_mass_storage.iSerialNumber=\"\" "\ 76 "clk_ignore_unused "\ 77 "\0" \ 78 "initrd_addr=0x83800000\0" \ 79 "initrd_high=0xffffffff\0" \ 80 "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ 81 82 #define CONFIG_DFU_ENV_SETTINGS \ 83 "dfu_alt_info=image raw 0 0x800000;"\ 84 "u-boot raw 0 0x4000;"\ 85 "bootimg part 0 1;"\ 86 "rootfs part 0 2\0" \ 87 88 #define CONFIG_EXTRA_ENV_SETTINGS \ 89 UPDATE_M4_ENV \ 90 CONFIG_MFG_ENV_SETTINGS \ 91 CONFIG_DFU_ENV_SETTINGS \ 92 "script=boot.scr\0" \ 93 "image=zImage\0" \ 94 "console=ttymxc0\0" \ 95 "fdt_high=0xffffffff\0" \ 96 "initrd_high=0xffffffff\0" \ 97 "fdt_file=imx7d-sdb.dtb\0" \ 98 "fdt_addr=0x83000000\0" \ 99 "boot_fdt=try\0" \ 100 "ip_dyn=yes\0" \ 101 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ 102 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 103 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 104 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 105 "mmcautodetect=yes\0" \ 106 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 107 "root=${mmcroot}\0" \ 108 "loadbootscript=" \ 109 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 110 "bootscript=echo Running bootscript from mmc ...; " \ 111 "source\0" \ 112 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 113 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 114 "mmcboot=echo Booting from mmc ...; " \ 115 "run mmcargs; " \ 116 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 117 "if run loadfdt; then " \ 118 "bootz ${loadaddr} - ${fdt_addr}; " \ 119 "else " \ 120 "if test ${boot_fdt} = try; then " \ 121 "bootz; " \ 122 "else " \ 123 "echo WARN: Cannot load the DT; " \ 124 "fi; " \ 125 "fi; " \ 126 "else " \ 127 "bootz; " \ 128 "fi;\0" \ 129 "netargs=setenv bootargs console=${console},${baudrate} " \ 130 "root=/dev/nfs " \ 131 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 132 "netboot=echo Booting from net ...; " \ 133 "run netargs; " \ 134 "if test ${ip_dyn} = yes; then " \ 135 "setenv get_cmd dhcp; " \ 136 "else " \ 137 "setenv get_cmd tftp; " \ 138 "fi; " \ 139 "${get_cmd} ${image}; " \ 140 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 141 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 142 "bootz ${loadaddr} - ${fdt_addr}; " \ 143 "else " \ 144 "if test ${boot_fdt} = try; then " \ 145 "bootz; " \ 146 "else " \ 147 "echo WARN: Cannot load the DT; " \ 148 "fi; " \ 149 "fi; " \ 150 "else " \ 151 "bootz; " \ 152 "fi;\0" 153 154 #define CONFIG_BOOTCOMMAND \ 155 "mmc dev ${mmcdev};" \ 156 "mmc dev ${mmcdev}; if mmc rescan; then " \ 157 "if run loadbootscript; then " \ 158 "run bootscript; " \ 159 "else " \ 160 "if run loadimage; then " \ 161 "run mmcboot; " \ 162 "else run netboot; " \ 163 "fi; " \ 164 "fi; " \ 165 "else run netboot; fi" 166 167 #define CONFIG_SYS_MEMTEST_START 0x80000000 168 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) 169 170 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 171 #define CONFIG_SYS_HZ 1000 172 173 /* Physical Memory Map */ 174 #define CONFIG_NR_DRAM_BANKS 1 175 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 176 177 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 178 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 179 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 180 181 #define CONFIG_SYS_INIT_SP_OFFSET \ 182 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 183 #define CONFIG_SYS_INIT_SP_ADDR \ 184 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 185 186 /* environment organization */ 187 #define CONFIG_ENV_SIZE SZ_8K 188 189 /* 190 * If want to use nand, define CONFIG_NAND_MXS and rework board 191 * to support nand, since emmc has pin conflicts with nand 192 */ 193 #ifdef CONFIG_NAND_MXS 194 /* NAND stuff */ 195 #define CONFIG_SYS_MAX_NAND_DEVICE 1 196 #define CONFIG_SYS_NAND_BASE 0x40000000 197 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 198 #define CONFIG_SYS_NAND_ONFI_DETECTION 199 200 /* DMA stuff, needed for GPMI/MXS NAND support */ 201 #define CONFIG_APBH_DMA 202 #define CONFIG_APBH_DMA_BURST 203 #define CONFIG_APBH_DMA_BURST8 204 #endif 205 206 #define CONFIG_ENV_OFFSET (12 * SZ_64K) 207 #ifdef CONFIG_NAND_MXS 208 #define CONFIG_SYS_FSL_USDHC_NUM 1 209 #else 210 #define CONFIG_SYS_FSL_USDHC_NUM 2 211 #endif 212 213 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ 214 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 215 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ 216 217 /* USB Configs */ 218 #define CONFIG_USB_HOST_ETHER 219 #define CONFIG_USB_ETHER_ASIX 220 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 221 222 #define CONFIG_IMX_THERMAL 223 224 #define CONFIG_USBD_HS 225 226 #define CONFIG_USB_FUNCTION_MASS_STORAGE 227 228 #ifdef CONFIG_VIDEO 229 #define CONFIG_VIDEO_MXS 230 #define CONFIG_VIDEO_LOGO 231 #define CONFIG_SPLASH_SCREEN 232 #define CONFIG_SPLASH_SCREEN_ALIGN 233 #define CONFIG_BMP_16BPP 234 #define CONFIG_VIDEO_BMP_RLE8 235 #define CONFIG_VIDEO_BMP_LOGO 236 #endif 237 238 #ifdef CONFIG_FSL_QSPI 239 #define CONFIG_SPI_FLASH 240 #define CONFIG_SPI_FLASH_MACRONIX 241 #define CONFIG_SPI_FLASH_BAR 242 #define CONFIG_SF_DEFAULT_BUS 0 243 #define CONFIG_SF_DEFAULT_CS 0 244 #define CONFIG_SF_DEFAULT_SPEED 40000000 245 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 246 #define FSL_QSPI_FLASH_NUM 1 247 #define FSL_QSPI_FLASH_SIZE SZ_64M 248 #define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR 249 #define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR 250 #endif 251 252 #endif /* __CONFIG_H */ 253