1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2015 Freescale Semiconductor, Inc.
4  *
5  * Configuration settings for the Freescale i.MX7D SABRESD board.
6  */
7 
8 #ifndef __MX7D_SABRESD_CONFIG_H
9 #define __MX7D_SABRESD_CONFIG_H
10 
11 #include "mx7_common.h"
12 
13 #define PHYS_SDRAM_SIZE			SZ_1G
14 
15 #define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
16 
17 /* Size of malloc() pool */
18 #define CONFIG_SYS_MALLOC_LEN		(32 * SZ_1M)
19 
20 /* Network */
21 #define CONFIG_FEC_MXC
22 #define CONFIG_FEC_XCV_TYPE             RGMII
23 #define CONFIG_ETHPRIME                 "FEC"
24 #define CONFIG_FEC_MXC_PHYADDR          0
25 
26 #define CONFIG_PHY_BROADCOM
27 /* ENET1 */
28 #define IMX_FEC_BASE			ENET_IPS_BASE_ADDR
29 
30 /* MMC Config*/
31 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
32 
33 #undef CONFIG_BOOTM_NETBSD
34 #undef CONFIG_BOOTM_PLAN9
35 #undef CONFIG_BOOTM_RTEMS
36 
37 /* I2C configs */
38 #define CONFIG_SYS_I2C_MXC
39 #define CONFIG_SYS_I2C_SPEED		100000
40 
41 #define CONFIG_SUPPORT_EMMC_BOOT	/* eMMC specific */
42 #define CONFIG_SYS_MMC_IMG_LOAD_PART	1
43 
44 #ifdef CONFIG_IMX_BOOTAUX
45 /* Set to QSPI1 A flash at default */
46 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000
47 
48 #define UPDATE_M4_ENV \
49 	"m4image=m4_qspi.bin\0" \
50 	"loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
51 	"update_m4_from_sd=" \
52 		"if sf probe 0:0; then " \
53 			"if run loadm4image; then " \
54 				"setexpr fw_sz ${filesize} + 0xffff; " \
55 				"setexpr fw_sz ${fw_sz} / 0x10000; "	\
56 				"setexpr fw_sz ${fw_sz} * 0x10000; "	\
57 				"sf erase 0x0 ${fw_sz}; " \
58 				"sf write ${loadaddr} 0x0 ${filesize}; " \
59 			"fi; " \
60 		"fi\0" \
61 	"m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
62 #else
63 #define UPDATE_M4_ENV ""
64 #endif
65 
66 #define CONFIG_MFG_ENV_SETTINGS \
67 	"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
68 		"rdinit=/linuxrc " \
69 		"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
70 		"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
71 		"g_mass_storage.iSerialNumber=\"\" "\
72 		"clk_ignore_unused "\
73 		"\0" \
74 	"initrd_addr=0x83800000\0" \
75 	"initrd_high=0xffffffff\0" \
76 	"bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
77 
78 #define CONFIG_DFU_ENV_SETTINGS \
79 	"dfu_alt_info=image raw 0 0x800000;"\
80 		"u-boot raw 0 0x4000;"\
81 		"bootimg part 0 1;"\
82 		"rootfs part 0 2\0" \
83 
84 #define CONFIG_EXTRA_ENV_SETTINGS \
85 	UPDATE_M4_ENV \
86 	CONFIG_MFG_ENV_SETTINGS \
87 	CONFIG_DFU_ENV_SETTINGS \
88 	"script=boot.scr\0" \
89 	"image=zImage\0" \
90 	"console=ttymxc0\0" \
91 	"fdt_high=0xffffffff\0" \
92 	"initrd_high=0xffffffff\0" \
93 	"fdt_file=imx7d-sdb.dtb\0" \
94 	"fdt_addr=0x83000000\0" \
95 	"boot_fdt=try\0" \
96 	"ip_dyn=yes\0" \
97 	"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
98 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
99 	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
100 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
101 	"mmcautodetect=yes\0" \
102 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
103 		"root=${mmcroot}\0" \
104 	"loadbootscript=" \
105 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
106 	"bootscript=echo Running bootscript from mmc ...; " \
107 		"source\0" \
108 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
109 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
110 	"mmcboot=echo Booting from mmc ...; " \
111 		"run mmcargs; " \
112 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
113 			"if run loadfdt; then " \
114 				"bootz ${loadaddr} - ${fdt_addr}; " \
115 			"else " \
116 				"if test ${boot_fdt} = try; then " \
117 					"bootz; " \
118 				"else " \
119 					"echo WARN: Cannot load the DT; " \
120 				"fi; " \
121 			"fi; " \
122 		"else " \
123 			"bootz; " \
124 		"fi;\0" \
125 	"netargs=setenv bootargs console=${console},${baudrate} " \
126 		"root=/dev/nfs " \
127 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
128 		"netboot=echo Booting from net ...; " \
129 		"run netargs; " \
130 		"if test ${ip_dyn} = yes; then " \
131 			"setenv get_cmd dhcp; " \
132 		"else " \
133 			"setenv get_cmd tftp; " \
134 		"fi; " \
135 		"${get_cmd} ${image}; " \
136 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
137 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
138 				"bootz ${loadaddr} - ${fdt_addr}; " \
139 			"else " \
140 				"if test ${boot_fdt} = try; then " \
141 					"bootz; " \
142 				"else " \
143 					"echo WARN: Cannot load the DT; " \
144 				"fi; " \
145 			"fi; " \
146 		"else " \
147 			"bootz; " \
148 		"fi;\0"
149 
150 #define CONFIG_BOOTCOMMAND \
151 	   "mmc dev ${mmcdev};" \
152 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
153 		   "if run loadbootscript; then " \
154 			   "run bootscript; " \
155 		   "else " \
156 			   "if run loadimage; then " \
157 				   "run mmcboot; " \
158 			   "else run netboot; " \
159 			   "fi; " \
160 		   "fi; " \
161 	   "else run netboot; fi"
162 
163 #define CONFIG_SYS_MEMTEST_START	0x80000000
164 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x20000000)
165 
166 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
167 #define CONFIG_SYS_HZ			1000
168 
169 /* Physical Memory Map */
170 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
171 
172 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
173 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
174 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
175 
176 #define CONFIG_SYS_INIT_SP_OFFSET \
177 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
178 #define CONFIG_SYS_INIT_SP_ADDR \
179 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
180 
181 /* environment organization */
182 #define CONFIG_ENV_SIZE			SZ_8K
183 
184 /*
185  * If want to use nand, define CONFIG_NAND_MXS and rework board
186  * to support nand, since emmc has pin conflicts with nand
187  */
188 #ifdef CONFIG_NAND_MXS
189 /* NAND stuff */
190 #define CONFIG_SYS_MAX_NAND_DEVICE	1
191 #define CONFIG_SYS_NAND_BASE		0x40000000
192 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
193 #define CONFIG_SYS_NAND_ONFI_DETECTION
194 
195 /* DMA stuff, needed for GPMI/MXS NAND support */
196 #endif
197 
198 #define CONFIG_ENV_OFFSET		(12 * SZ_64K)
199 #ifdef CONFIG_NAND_MXS
200 #define CONFIG_SYS_FSL_USDHC_NUM	1
201 #else
202 #define CONFIG_SYS_FSL_USDHC_NUM	2
203 #endif
204 
205 #define CONFIG_SYS_MMC_ENV_DEV		0   /* USDHC1 */
206 #define CONFIG_SYS_MMC_ENV_PART		0	/* user area */
207 #define CONFIG_MMCROOT			"/dev/mmcblk0p2"  /* USDHC1 */
208 
209 /* USB Configs */
210 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
211 
212 #define CONFIG_IMX_THERMAL
213 
214 #define CONFIG_USBD_HS
215 
216 #ifdef CONFIG_VIDEO
217 #define CONFIG_VIDEO_MXS
218 #define CONFIG_VIDEO_LOGO
219 #define CONFIG_SPLASH_SCREEN
220 #define CONFIG_SPLASH_SCREEN_ALIGN
221 #define CONFIG_BMP_16BPP
222 #define CONFIG_VIDEO_BMP_RLE8
223 #define CONFIG_VIDEO_BMP_LOGO
224 #endif
225 
226 #ifdef CONFIG_FSL_QSPI
227 #define CONFIG_SYS_FSL_QSPI_AHB
228 #define CONFIG_SF_DEFAULT_BUS		0
229 #define CONFIG_SF_DEFAULT_CS		0
230 #define CONFIG_SF_DEFAULT_SPEED		40000000
231 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
232 #define FSL_QSPI_FLASH_NUM		1
233 #define FSL_QSPI_FLASH_SIZE		SZ_64M
234 #define QSPI0_BASE_ADDR			QSPI1_IPS_BASE_ADDR
235 #define QSPI0_AMBA_BASE			QSPI0_ARB_BASE_ADDR
236 #endif
237 
238 #endif	/* __CONFIG_H */
239