1 /* 2 * Copyright (C) 2015 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX7D SABRESD board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __MX7D_SABRESD_CONFIG_H 10 #define __MX7D_SABRESD_CONFIG_H 11 12 #include "mx7_common.h" 13 14 #define CONFIG_DBG_MONITOR 15 #define PHYS_SDRAM_SIZE SZ_1G 16 17 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR 18 19 /* Size of malloc() pool */ 20 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) 21 22 #define CONFIG_BOARD_EARLY_INIT_F 23 #define CONFIG_BOARD_LATE_INIT 24 25 /* Network */ 26 #define CONFIG_FEC_MXC 27 #define CONFIG_MII 28 #define CONFIG_FEC_XCV_TYPE RGMII 29 #define CONFIG_ETHPRIME "FEC" 30 #define CONFIG_FEC_MXC_PHYADDR 0 31 32 #define CONFIG_PHYLIB 33 #define CONFIG_PHY_BROADCOM 34 /* ENET1 */ 35 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR 36 37 /* MMC Config*/ 38 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 39 40 /* PMIC */ 41 #define CONFIG_POWER 42 #define CONFIG_POWER_I2C 43 #define CONFIG_POWER_PFUZE3000 44 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 45 46 #undef CONFIG_BOOTM_NETBSD 47 #undef CONFIG_BOOTM_PLAN9 48 #undef CONFIG_BOOTM_RTEMS 49 50 /* I2C configs */ 51 #define CONFIG_SYS_I2C 52 #define CONFIG_SYS_I2C_MXC 53 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 54 #define CONFIG_SYS_I2C_SPEED 100000 55 56 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 57 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 58 59 #ifdef CONFIG_IMX_BOOTAUX 60 /* Set to QSPI1 A flash at default */ 61 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000 62 63 #define UPDATE_M4_ENV \ 64 "m4image=m4_qspi.bin\0" \ 65 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \ 66 "update_m4_from_sd=" \ 67 "if sf probe 0:0; then " \ 68 "if run loadm4image; then " \ 69 "setexpr fw_sz ${filesize} + 0xffff; " \ 70 "setexpr fw_sz ${fw_sz} / 0x10000; " \ 71 "setexpr fw_sz ${fw_sz} * 0x10000; " \ 72 "sf erase 0x0 ${fw_sz}; " \ 73 "sf write ${loadaddr} 0x0 ${filesize}; " \ 74 "fi; " \ 75 "fi\0" \ 76 "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" 77 #else 78 #define UPDATE_M4_ENV "" 79 #endif 80 81 #define CONFIG_MFG_ENV_SETTINGS \ 82 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ 83 "rdinit=/linuxrc " \ 84 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ 85 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ 86 "g_mass_storage.iSerialNumber=\"\" "\ 87 "clk_ignore_unused "\ 88 "\0" \ 89 "initrd_addr=0x83800000\0" \ 90 "initrd_high=0xffffffff\0" \ 91 "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ 92 93 #define CONFIG_DFU_ENV_SETTINGS \ 94 "dfu_alt_info=image raw 0 0x800000;"\ 95 "u-boot raw 0 0x4000;"\ 96 "bootimg part 0 1;"\ 97 "rootfs part 0 2\0" \ 98 99 #define CONFIG_EXTRA_ENV_SETTINGS \ 100 UPDATE_M4_ENV \ 101 CONFIG_MFG_ENV_SETTINGS \ 102 CONFIG_DFU_ENV_SETTINGS \ 103 "script=boot.scr\0" \ 104 "image=zImage\0" \ 105 "console=ttymxc0\0" \ 106 "fdt_high=0xffffffff\0" \ 107 "initrd_high=0xffffffff\0" \ 108 "fdt_file=imx7d-sdb.dtb\0" \ 109 "fdt_addr=0x83000000\0" \ 110 "boot_fdt=try\0" \ 111 "ip_dyn=yes\0" \ 112 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ 113 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 114 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 115 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 116 "mmcautodetect=yes\0" \ 117 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 118 "root=${mmcroot}\0" \ 119 "loadbootscript=" \ 120 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 121 "bootscript=echo Running bootscript from mmc ...; " \ 122 "source\0" \ 123 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 124 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 125 "mmcboot=echo Booting from mmc ...; " \ 126 "run mmcargs; " \ 127 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 128 "if run loadfdt; then " \ 129 "bootz ${loadaddr} - ${fdt_addr}; " \ 130 "else " \ 131 "if test ${boot_fdt} = try; then " \ 132 "bootz; " \ 133 "else " \ 134 "echo WARN: Cannot load the DT; " \ 135 "fi; " \ 136 "fi; " \ 137 "else " \ 138 "bootz; " \ 139 "fi;\0" \ 140 "netargs=setenv bootargs console=${console},${baudrate} " \ 141 "root=/dev/nfs " \ 142 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 143 "netboot=echo Booting from net ...; " \ 144 "run netargs; " \ 145 "if test ${ip_dyn} = yes; then " \ 146 "setenv get_cmd dhcp; " \ 147 "else " \ 148 "setenv get_cmd tftp; " \ 149 "fi; " \ 150 "${get_cmd} ${image}; " \ 151 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 152 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 153 "bootz ${loadaddr} - ${fdt_addr}; " \ 154 "else " \ 155 "if test ${boot_fdt} = try; then " \ 156 "bootz; " \ 157 "else " \ 158 "echo WARN: Cannot load the DT; " \ 159 "fi; " \ 160 "fi; " \ 161 "else " \ 162 "bootz; " \ 163 "fi;\0" 164 165 #define CONFIG_BOOTCOMMAND \ 166 "mmc dev ${mmcdev};" \ 167 "mmc dev ${mmcdev}; if mmc rescan; then " \ 168 "if run loadbootscript; then " \ 169 "run bootscript; " \ 170 "else " \ 171 "if run loadimage; then " \ 172 "run mmcboot; " \ 173 "else run netboot; " \ 174 "fi; " \ 175 "fi; " \ 176 "else run netboot; fi" 177 178 #define CONFIG_SYS_MEMTEST_START 0x80000000 179 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) 180 181 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 182 #define CONFIG_SYS_HZ 1000 183 184 #define CONFIG_STACKSIZE SZ_128K 185 186 /* Physical Memory Map */ 187 #define CONFIG_NR_DRAM_BANKS 1 188 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 189 190 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 191 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 192 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 193 194 #define CONFIG_SYS_INIT_SP_OFFSET \ 195 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 196 #define CONFIG_SYS_INIT_SP_ADDR \ 197 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 198 199 /* FLASH and environment organization */ 200 #define CONFIG_SYS_NO_FLASH 201 #define CONFIG_ENV_SIZE SZ_8K 202 #define CONFIG_ENV_IS_IN_MMC 203 204 /* MXC SPI driver support */ 205 #define CONFIG_MXC_SPI 206 207 /* 208 * If want to use nand, define CONFIG_NAND_MXS and rework board 209 * to support nand, since emmc has pin conflicts with nand 210 */ 211 #ifdef CONFIG_NAND_MXS 212 #define CONFIG_CMD_NAND 213 #define CONFIG_CMD_NAND_TRIMFFS 214 215 /* NAND stuff */ 216 #define CONFIG_SYS_MAX_NAND_DEVICE 1 217 #define CONFIG_SYS_NAND_BASE 0x40000000 218 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 219 #define CONFIG_SYS_NAND_ONFI_DETECTION 220 221 /* DMA stuff, needed for GPMI/MXS NAND support */ 222 #define CONFIG_APBH_DMA 223 #define CONFIG_APBH_DMA_BURST 224 #define CONFIG_APBH_DMA_BURST8 225 #endif 226 227 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 228 #ifdef CONFIG_NAND_MXS 229 #define CONFIG_SYS_FSL_USDHC_NUM 1 230 #else 231 #define CONFIG_SYS_FSL_USDHC_NUM 2 232 #endif 233 234 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ 235 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 236 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ 237 238 /* USB Configs */ 239 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 240 #define CONFIG_USB_HOST_ETHER 241 #define CONFIG_USB_ETHER_ASIX 242 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 243 #define CONFIG_MXC_USB_FLAGS 0 244 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 245 246 #define CONFIG_IMX_THERMAL 247 248 #define CONFIG_USBD_HS 249 250 #define CONFIG_USB_FUNCTION_MASS_STORAGE 251 252 #ifdef CONFIG_VIDEO 253 #define CONFIG_VIDEO_MXS 254 #define CONFIG_VIDEO_LOGO 255 #define CONFIG_SPLASH_SCREEN 256 #define CONFIG_SPLASH_SCREEN_ALIGN 257 #define CONFIG_CMD_BMP 258 #define CONFIG_BMP_16BPP 259 #define CONFIG_VIDEO_BMP_RLE8 260 #define CONFIG_VIDEO_BMP_LOGO 261 #endif 262 263 #ifdef CONFIG_FSL_QSPI 264 #define CONFIG_SPI_FLASH 265 #define CONFIG_SPI_FLASH_MACRONIX 266 #define CONFIG_SPI_FLASH_BAR 267 #define CONFIG_SF_DEFAULT_BUS 0 268 #define CONFIG_SF_DEFAULT_CS 0 269 #define CONFIG_SF_DEFAULT_SPEED 40000000 270 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 271 #define FSL_QSPI_FLASH_NUM 1 272 #define FSL_QSPI_FLASH_SIZE SZ_64M 273 #define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR 274 #define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR 275 #endif 276 277 #endif /* __CONFIG_H */ 278