xref: /openbmc/u-boot/include/configs/mx7_common.h (revision ec9c80d6)
1 /*
2  * Copyright (C) 2015 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Freescale i.MX7.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __MX7_COMMON_H
10 #define __MX7_COMMON_H
11 
12 #include <linux/sizes.h>
13 #include <asm/arch/imx-regs.h>
14 #include <asm/mach-imx/gpio.h>
15 
16 #ifndef CONFIG_MX7
17 #define CONFIG_MX7
18 #endif
19 
20 /* Timer settings */
21 #define CONFIG_MXC_GPT_HCLK
22 #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
23 #define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK
24 #define CONFIG_SYS_FSL_CLK
25 
26 #define CONFIG_SYS_BOOTM_LEN	0x1000000
27 
28 /* Enable iomux-lpsr support */
29 #define CONFIG_IOMUX_LPSR
30 
31 #define CONFIG_LOADADDR                 0x80800000
32 
33 /* allow to overwrite serial and ethaddr */
34 #define CONFIG_ENV_OVERWRITE
35 
36 /* Miscellaneous configurable options */
37 #define CONFIG_SYS_CBSIZE		512
38 #define CONFIG_SYS_MAXARGS		32
39 
40 #ifndef CONFIG_SYS_DCACHE_OFF
41 #endif
42 
43 /* UART */
44 #define CONFIG_MXC_UART
45 
46 /* MMC */
47 #define CONFIG_BOUNCE_BUFFER
48 #define CONFIG_FSL_ESDHC
49 #define CONFIG_FSL_USDHC
50 
51 /* Fuses */
52 #define CONFIG_MXC_OCOTP
53 
54 #define CONFIG_ARMV7_SECURE_BASE	0x00900000
55 
56 #define CONFIG_ARMV7_PSCI_1_0
57 
58 /* Secure boot (HAB) support */
59 #ifdef CONFIG_SECURE_BOOT
60 #define CONFIG_CSF_SIZE			0x2000
61 #endif
62 
63 #endif
64