xref: /openbmc/u-boot/include/configs/mx7_common.h (revision 8729d582)
1 /*
2  * Copyright (C) 2015 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Freescale i.MX7.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __MX7_COMMON_H
10 #define __MX7_COMMON_H
11 
12 #include <linux/sizes.h>
13 #include <asm/arch/imx-regs.h>
14 #include <asm/imx-common/gpio.h>
15 
16 #ifndef CONFIG_MX7
17 #define CONFIG_MX7
18 #endif
19 
20 /* Timer settings */
21 #define CONFIG_MXC_GPT_HCLK
22 #define CONFIG_SYSCOUNTER_TIMER
23 #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
24 #define CONFIG_SYS_FSL_CLK
25 
26 #define CONFIG_SYS_BOOTM_LEN	0x1000000
27 
28 /* Enable iomux-lpsr support */
29 #define CONFIG_IOMUX_LPSR
30 
31 #define CONFIG_DISPLAY_CPUINFO
32 #define CONFIG_DISPLAY_BOARDINFO
33 
34 #define CONFIG_LOADADDR                 0x80800000
35 #define CONFIG_SYS_TEXT_BASE            0x87800000
36 
37 /* allow to overwrite serial and ethaddr */
38 #define CONFIG_ENV_OVERWRITE
39 #define CONFIG_CONS_INDEX               1
40 #define CONFIG_BAUDRATE                 115200
41 
42 /* Filesystems and image support */
43 #define CONFIG_DOS_PARTITION
44 
45 /* Miscellaneous configurable options */
46 #define CONFIG_SYS_LONGHELP
47 #define CONFIG_CMDLINE_EDITING
48 #define CONFIG_AUTO_COMPLETE
49 #define CONFIG_SYS_CBSIZE		512
50 #define CONFIG_SYS_MAXARGS		32
51 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
52 
53 #ifndef CONFIG_SYS_DCACHE_OFF
54 #endif
55 
56 /* GPIO */
57 #define CONFIG_MXC_GPIO
58 
59 /* UART */
60 #define CONFIG_MXC_UART
61 
62 /* MMC */
63 #define CONFIG_MMC
64 #define CONFIG_GENERIC_MMC
65 #define CONFIG_BOUNCE_BUFFER
66 #define CONFIG_FSL_ESDHC
67 #define CONFIG_FSL_USDHC
68 
69 /* Fuses */
70 #define CONFIG_CMD_FUSE
71 #define CONFIG_MXC_OCOTP
72 
73 /*
74  * Default boot linux kernel in no secure mode.
75  * If want to boot kernel in secure mode, please define CONFIG_MX7_SEC
76  */
77 #ifndef CONFIG_MX7_SEC
78 #define CONFIG_ARMV7_NONSEC
79 #define CONFIG_ARMV7_PSCI
80 #define CONFIG_ARMV7_PSCI_NR_CPUS	2
81 #define CONFIG_ARMV7_SECURE_BASE	0x00900000
82 #endif
83 
84 #endif
85