1 /* 2 * Copyright (C) 2016 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX6UL 14x14 EVK board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 #ifndef __MX6ULLEVK_CONFIG_H 9 #define __MX6ULLEVK_CONFIG_H 10 11 12 #include <asm/arch/imx-regs.h> 13 #include <linux/sizes.h> 14 #include "mx6_common.h" 15 #include <asm/mach-imx/gpio.h> 16 17 #ifdef CONFIG_SECURE_BOOT 18 #ifndef CONFIG_CSF_SIZE 19 #define CONFIG_CSF_SIZE 0x4000 20 #endif 21 #endif 22 23 #define PHYS_SDRAM_SIZE SZ_512M 24 25 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 26 27 /* Size of malloc() pool */ 28 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) 29 30 #define CONFIG_MXC_UART 31 #define CONFIG_MXC_UART_BASE UART1_BASE 32 33 /* MMC Configs */ 34 #ifdef CONFIG_FSL_USDHC 35 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 36 37 /* NAND pin conflicts with usdhc2 */ 38 #ifdef CONFIG_SYS_USE_NAND 39 #define CONFIG_SYS_FSL_USDHC_NUM 1 40 #else 41 #define CONFIG_SYS_FSL_USDHC_NUM 2 42 #endif 43 #endif 44 45 /* I2C configs */ 46 #ifdef CONFIG_CMD_I2C 47 #define CONFIG_SYS_I2C_MXC 48 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 49 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 50 #define CONFIG_SYS_I2C_SPEED 100000 51 #endif 52 53 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 54 55 #define CONFIG_EXTRA_ENV_SETTINGS \ 56 "script=boot.scr\0" \ 57 "image=zImage\0" \ 58 "console=ttymxc0\0" \ 59 "fdt_high=0xffffffff\0" \ 60 "initrd_high=0xffffffff\0" \ 61 "fdt_file=imx6ull-14x14-evk.dtb\0" \ 62 "fdt_addr=0x83000000\0" \ 63 "boot_fdt=try\0" \ 64 "ip_dyn=yes\0" \ 65 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ 66 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 67 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 68 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 69 "mmcautodetect=yes\0" \ 70 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 71 "root=${mmcroot}\0" \ 72 "loadbootscript=" \ 73 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 74 "bootscript=echo Running bootscript from mmc ...; " \ 75 "source\0" \ 76 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 77 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 78 "mmcboot=echo Booting from mmc ...; " \ 79 "run mmcargs; " \ 80 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 81 "if run loadfdt; then " \ 82 "bootz ${loadaddr} - ${fdt_addr}; " \ 83 "else " \ 84 "if test ${boot_fdt} = try; then " \ 85 "bootz; " \ 86 "else " \ 87 "echo WARN: Cannot load the DT; " \ 88 "fi; " \ 89 "fi; " \ 90 "else " \ 91 "bootz; " \ 92 "fi;\0" \ 93 "netargs=setenv bootargs console=${console},${baudrate} " \ 94 "root=/dev/nfs " \ 95 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 96 "netboot=echo Booting from net ...; " \ 97 "run netargs; " \ 98 "if test ${ip_dyn} = yes; then " \ 99 "setenv get_cmd dhcp; " \ 100 "else " \ 101 "setenv get_cmd tftp; " \ 102 "fi; " \ 103 "${get_cmd} ${image}; " \ 104 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 105 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 106 "bootz ${loadaddr} - ${fdt_addr}; " \ 107 "else " \ 108 "if test ${boot_fdt} = try; then " \ 109 "bootz; " \ 110 "else " \ 111 "echo WARN: Cannot load the DT; " \ 112 "fi; " \ 113 "fi; " \ 114 "else " \ 115 "bootz; " \ 116 "fi;\0" \ 117 118 #define CONFIG_BOOTCOMMAND \ 119 "mmc dev ${mmcdev};" \ 120 "mmc dev ${mmcdev}; if mmc rescan; then " \ 121 "if run loadbootscript; then " \ 122 "run bootscript; " \ 123 "else " \ 124 "if run loadimage; then " \ 125 "run mmcboot; " \ 126 "else run netboot; " \ 127 "fi; " \ 128 "fi; " \ 129 "else run netboot; fi" 130 131 /* Miscellaneous configurable options */ 132 #define CONFIG_SYS_MEMTEST_START 0x80000000 133 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) 134 135 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 136 #define CONFIG_SYS_HZ 1000 137 138 /* Physical Memory Map */ 139 #define CONFIG_NR_DRAM_BANKS 1 140 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 141 142 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 143 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 144 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 145 146 #define CONFIG_SYS_INIT_SP_OFFSET \ 147 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 148 #define CONFIG_SYS_INIT_SP_ADDR \ 149 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 150 151 /* environment organization */ 152 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ 153 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 154 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 155 156 #define CONFIG_ENV_SIZE SZ_8K 157 #define CONFIG_ENV_OFFSET (12 * SZ_64K) 158 159 #define CONFIG_IMX_THERMAL 160 161 #define CONFIG_IOMUX_LPSR 162 163 #define CONFIG_SOFT_SPI 164 165 #ifdef CONFIG_FSL_QSPI 166 #define CONFIG_SYS_FSL_QSPI_AHB 167 #define CONFIG_SF_DEFAULT_BUS 0 168 #define CONFIG_SF_DEFAULT_CS 0 169 #define CONFIG_SF_DEFAULT_SPEED 40000000 170 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 171 #define FSL_QSPI_FLASH_NUM 1 172 #define FSL_QSPI_FLASH_SIZE SZ_32M 173 #endif 174 175 #endif 176