1 /* 2 * Copyright (C) 2016 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX6UL 14x14 EVK board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 #ifndef __MX6ULLEVK_CONFIG_H 9 #define __MX6ULLEVK_CONFIG_H 10 11 12 #include <asm/arch/imx-regs.h> 13 #include <linux/sizes.h> 14 #include "mx6_common.h" 15 #include <asm/mach-imx/gpio.h> 16 17 #ifdef CONFIG_SECURE_BOOT 18 #ifndef CONFIG_CSF_SIZE 19 #define CONFIG_CSF_SIZE 0x4000 20 #endif 21 #endif 22 23 #define PHYS_SDRAM_SIZE SZ_512M 24 25 /* Size of malloc() pool */ 26 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) 27 28 #define CONFIG_MXC_UART 29 #define CONFIG_MXC_UART_BASE UART1_BASE 30 31 /* MMC Configs */ 32 #ifdef CONFIG_FSL_USDHC 33 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 34 35 /* NAND pin conflicts with usdhc2 */ 36 #ifdef CONFIG_SYS_USE_NAND 37 #define CONFIG_SYS_FSL_USDHC_NUM 1 38 #else 39 #define CONFIG_SYS_FSL_USDHC_NUM 2 40 #endif 41 #endif 42 43 /* I2C configs */ 44 #ifdef CONFIG_CMD_I2C 45 #define CONFIG_SYS_I2C_MXC 46 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 47 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 48 #define CONFIG_SYS_I2C_SPEED 100000 49 #endif 50 51 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 52 53 #define CONFIG_EXTRA_ENV_SETTINGS \ 54 "script=boot.scr\0" \ 55 "image=zImage\0" \ 56 "console=ttymxc0\0" \ 57 "fdt_high=0xffffffff\0" \ 58 "initrd_high=0xffffffff\0" \ 59 "fdt_file=imx6ull-14x14-evk.dtb\0" \ 60 "fdt_addr=0x83000000\0" \ 61 "boot_fdt=try\0" \ 62 "ip_dyn=yes\0" \ 63 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ 64 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 65 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 66 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 67 "mmcautodetect=yes\0" \ 68 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 69 "root=${mmcroot}\0" \ 70 "loadbootscript=" \ 71 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 72 "bootscript=echo Running bootscript from mmc ...; " \ 73 "source\0" \ 74 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 75 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 76 "mmcboot=echo Booting from mmc ...; " \ 77 "run mmcargs; " \ 78 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 79 "if run loadfdt; then " \ 80 "bootz ${loadaddr} - ${fdt_addr}; " \ 81 "else " \ 82 "if test ${boot_fdt} = try; then " \ 83 "bootz; " \ 84 "else " \ 85 "echo WARN: Cannot load the DT; " \ 86 "fi; " \ 87 "fi; " \ 88 "else " \ 89 "bootz; " \ 90 "fi;\0" \ 91 "netargs=setenv bootargs console=${console},${baudrate} " \ 92 "root=/dev/nfs " \ 93 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 94 "netboot=echo Booting from net ...; " \ 95 "run netargs; " \ 96 "if test ${ip_dyn} = yes; then " \ 97 "setenv get_cmd dhcp; " \ 98 "else " \ 99 "setenv get_cmd tftp; " \ 100 "fi; " \ 101 "${get_cmd} ${image}; " \ 102 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 103 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 104 "bootz ${loadaddr} - ${fdt_addr}; " \ 105 "else " \ 106 "if test ${boot_fdt} = try; then " \ 107 "bootz; " \ 108 "else " \ 109 "echo WARN: Cannot load the DT; " \ 110 "fi; " \ 111 "fi; " \ 112 "else " \ 113 "bootz; " \ 114 "fi;\0" \ 115 116 #define CONFIG_BOOTCOMMAND \ 117 "mmc dev ${mmcdev};" \ 118 "mmc dev ${mmcdev}; if mmc rescan; then " \ 119 "if run loadbootscript; then " \ 120 "run bootscript; " \ 121 "else " \ 122 "if run loadimage; then " \ 123 "run mmcboot; " \ 124 "else run netboot; " \ 125 "fi; " \ 126 "fi; " \ 127 "else run netboot; fi" 128 129 /* Miscellaneous configurable options */ 130 #define CONFIG_SYS_MEMTEST_START 0x80000000 131 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) 132 133 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 134 #define CONFIG_SYS_HZ 1000 135 136 /* Physical Memory Map */ 137 #define CONFIG_NR_DRAM_BANKS 1 138 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 139 140 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 141 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 142 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 143 144 #define CONFIG_SYS_INIT_SP_OFFSET \ 145 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 146 #define CONFIG_SYS_INIT_SP_ADDR \ 147 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 148 149 /* environment organization */ 150 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ 151 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 152 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 153 154 #define CONFIG_ENV_SIZE SZ_8K 155 #define CONFIG_ENV_OFFSET (12 * SZ_64K) 156 157 #define CONFIG_IMX_THERMAL 158 159 #define CONFIG_IOMUX_LPSR 160 161 #define CONFIG_SOFT_SPI 162 163 #ifdef CONFIG_FSL_QSPI 164 #define CONFIG_SYS_FSL_QSPI_AHB 165 #define CONFIG_SF_DEFAULT_BUS 0 166 #define CONFIG_SF_DEFAULT_CS 0 167 #define CONFIG_SF_DEFAULT_SPEED 40000000 168 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 169 #define FSL_QSPI_FLASH_NUM 1 170 #define FSL_QSPI_FLASH_SIZE SZ_32M 171 #endif 172 173 #endif 174