1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2015 Freescale Semiconductor, Inc. 4 * 5 * Configuration settings for the Freescale i.MX6UL 14x14 EVK board. 6 */ 7 #ifndef __MX6UL_14X14_EVK_CONFIG_H 8 #define __MX6UL_14X14_EVK_CONFIG_H 9 10 #include <asm/arch/imx-regs.h> 11 #include <linux/sizes.h> 12 #include "mx6_common.h" 13 #include <asm/mach-imx/gpio.h> 14 15 #define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) 16 17 /* SPL options */ 18 #include "imx6_spl.h" 19 20 /* Size of malloc() pool */ 21 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) 22 23 #define CONFIG_MXC_UART 24 #define CONFIG_MXC_UART_BASE UART1_BASE 25 26 /* MMC Configs */ 27 #ifdef CONFIG_FSL_USDHC 28 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 29 30 /* NAND pin conflicts with usdhc2 */ 31 #ifdef CONFIG_NAND_MXS 32 #define CONFIG_SYS_FSL_USDHC_NUM 1 33 #else 34 #define CONFIG_SYS_FSL_USDHC_NUM 2 35 #endif 36 37 #endif 38 39 /* I2C configs */ 40 #ifdef CONFIG_CMD_I2C 41 #define CONFIG_SYS_I2C 42 #define CONFIG_SYS_I2C_MXC 43 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 44 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 45 #define CONFIG_SYS_I2C_SPEED 100000 46 47 /* PMIC only for 9X9 EVK */ 48 #define CONFIG_POWER 49 #define CONFIG_POWER_I2C 50 #define CONFIG_POWER_PFUZE3000 51 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 52 #endif 53 54 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 55 56 #define CONFIG_EXTRA_ENV_SETTINGS \ 57 "script=boot.scr\0" \ 58 "image=zImage\0" \ 59 "console=ttymxc0\0" \ 60 "fdt_high=0xffffffff\0" \ 61 "initrd_high=0xffffffff\0" \ 62 "fdt_file=undefined\0" \ 63 "fdt_addr=0x83000000\0" \ 64 "boot_fdt=try\0" \ 65 "ip_dyn=yes\0" \ 66 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ 67 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 68 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 69 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 70 "mmcautodetect=yes\0" \ 71 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 72 "root=${mmcroot}\0" \ 73 "loadbootscript=" \ 74 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 75 "bootscript=echo Running bootscript from mmc ...; " \ 76 "source\0" \ 77 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 78 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 79 "mmcboot=echo Booting from mmc ...; " \ 80 "run mmcargs; " \ 81 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 82 "if run loadfdt; then " \ 83 "bootz ${loadaddr} - ${fdt_addr}; " \ 84 "else " \ 85 "if test ${boot_fdt} = try; then " \ 86 "bootz; " \ 87 "else " \ 88 "echo WARN: Cannot load the DT; " \ 89 "fi; " \ 90 "fi; " \ 91 "else " \ 92 "bootz; " \ 93 "fi;\0" \ 94 "netargs=setenv bootargs console=${console},${baudrate} " \ 95 "root=/dev/nfs " \ 96 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 97 "netboot=echo Booting from net ...; " \ 98 "run netargs; " \ 99 "if test ${ip_dyn} = yes; then " \ 100 "setenv get_cmd dhcp; " \ 101 "else " \ 102 "setenv get_cmd tftp; " \ 103 "fi; " \ 104 "${get_cmd} ${image}; " \ 105 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 106 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 107 "bootz ${loadaddr} - ${fdt_addr}; " \ 108 "else " \ 109 "if test ${boot_fdt} = try; then " \ 110 "bootz; " \ 111 "else " \ 112 "echo WARN: Cannot load the DT; " \ 113 "fi; " \ 114 "fi; " \ 115 "else " \ 116 "bootz; " \ 117 "fi;\0" \ 118 "findfdt="\ 119 "if test $fdt_file = undefined; then " \ 120 "if test $board_name = EVK && test $board_rev = 9X9; then " \ 121 "setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \ 122 "if test $board_name = EVK && test $board_rev = 14X14; then " \ 123 "setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \ 124 "if test $fdt_file = undefined; then " \ 125 "echo WARNING: Could not determine dtb to use; fi; " \ 126 "fi;\0" \ 127 128 #define CONFIG_BOOTCOMMAND \ 129 "run findfdt;" \ 130 "mmc dev ${mmcdev};" \ 131 "mmc dev ${mmcdev}; if mmc rescan; then " \ 132 "if run loadbootscript; then " \ 133 "run bootscript; " \ 134 "else " \ 135 "if run loadimage; then " \ 136 "run mmcboot; " \ 137 "else run netboot; " \ 138 "fi; " \ 139 "fi; " \ 140 "else run netboot; fi" 141 142 /* Miscellaneous configurable options */ 143 #define CONFIG_SYS_MEMTEST_START 0x80000000 144 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) 145 146 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 147 #define CONFIG_SYS_HZ 1000 148 149 /* Physical Memory Map */ 150 #define CONFIG_NR_DRAM_BANKS 1 151 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 152 153 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 154 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 155 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 156 157 #define CONFIG_SYS_INIT_SP_OFFSET \ 158 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 159 #define CONFIG_SYS_INIT_SP_ADDR \ 160 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 161 162 /* environment organization */ 163 #define CONFIG_ENV_SIZE SZ_8K 164 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 165 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ 166 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 167 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 168 169 #ifdef CONFIG_FSL_QSPI 170 #define CONFIG_SF_DEFAULT_BUS 0 171 #define CONFIG_SF_DEFAULT_CS 0 172 #define CONFIG_SF_DEFAULT_SPEED 40000000 173 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 174 #define FSL_QSPI_FLASH_NUM 1 175 #define FSL_QSPI_FLASH_SIZE SZ_32M 176 #endif 177 178 /* USB Configs */ 179 #ifdef CONFIG_CMD_USB 180 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 181 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 182 #define CONFIG_MXC_USB_FLAGS 0 183 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 184 #endif 185 186 #ifdef CONFIG_CMD_NET 187 #define CONFIG_FEC_MXC 188 #define CONFIG_MII 189 #define CONFIG_FEC_ENET_DEV 1 190 191 #if (CONFIG_FEC_ENET_DEV == 0) 192 #define IMX_FEC_BASE ENET_BASE_ADDR 193 #define CONFIG_FEC_MXC_PHYADDR 0x2 194 #define CONFIG_FEC_XCV_TYPE RMII 195 #elif (CONFIG_FEC_ENET_DEV == 1) 196 #define IMX_FEC_BASE ENET2_BASE_ADDR 197 #define CONFIG_FEC_MXC_PHYADDR 0x1 198 #define CONFIG_FEC_XCV_TYPE RMII 199 #endif 200 #define CONFIG_ETHPRIME "FEC" 201 #endif 202 203 #define CONFIG_IMX_THERMAL 204 205 #ifndef CONFIG_SPL_BUILD 206 #ifdef CONFIG_VIDEO 207 #define CONFIG_VIDEO_MXS 208 #define CONFIG_VIDEO_LOGO 209 #define CONFIG_SPLASH_SCREEN 210 #define CONFIG_SPLASH_SCREEN_ALIGN 211 #define CONFIG_BMP_16BPP 212 #define CONFIG_VIDEO_BMP_RLE8 213 #define CONFIG_VIDEO_BMP_LOGO 214 #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR 215 #endif 216 #endif 217 218 #endif 219