1 /* 2 * Copyright 2014 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX6SX Sabresd board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "mx6_common.h" 13 14 #ifdef CONFIG_SPL 15 #include "imx6_spl.h" 16 #endif 17 18 /* Size of malloc() pool */ 19 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) 20 21 #define CONFIG_MXC_UART 22 #define CONFIG_MXC_UART_BASE UART1_BASE 23 24 #ifdef CONFIG_IMX_BOOTAUX 25 /* Set to QSPI2 B flash at default */ 26 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000 27 28 #define UPDATE_M4_ENV \ 29 "m4image=m4_qspi.bin\0" \ 30 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \ 31 "update_m4_from_sd=" \ 32 "if sf probe 1:0; then " \ 33 "if run loadm4image; then " \ 34 "setexpr fw_sz ${filesize} + 0xffff; " \ 35 "setexpr fw_sz ${fw_sz} / 0x10000; " \ 36 "setexpr fw_sz ${fw_sz} * 0x10000; " \ 37 "sf erase 0x0 ${fw_sz}; " \ 38 "sf write ${loadaddr} 0x0 ${filesize}; " \ 39 "fi; " \ 40 "fi\0" \ 41 "m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" 42 #else 43 #define UPDATE_M4_ENV "" 44 #endif 45 46 #define CONFIG_EXTRA_ENV_SETTINGS \ 47 UPDATE_M4_ENV \ 48 "script=boot.scr\0" \ 49 "image=zImage\0" \ 50 "console=ttymxc0\0" \ 51 "fdt_high=0xffffffff\0" \ 52 "initrd_high=0xffffffff\0" \ 53 "fdt_file=imx6sx-sdb.dtb\0" \ 54 "fdt_addr=0x88000000\0" \ 55 "boot_fdt=try\0" \ 56 "ip_dyn=yes\0" \ 57 "videomode=video=ctfb:x:800,y:480,depth:24,pclk:29850,le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0\0" \ 58 "mmcdev=2\0" \ 59 "mmcpart=1\0" \ 60 "finduuid=part uuid mmc 2:2 uuid\0" \ 61 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 62 "root=PARTUUID=${uuid} rootwait rw\0" \ 63 "loadbootscript=" \ 64 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 65 "bootscript=echo Running bootscript from mmc ...; " \ 66 "source\0" \ 67 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 68 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 69 "mmcboot=echo Booting from mmc ...; " \ 70 "run finduuid; " \ 71 "run mmcargs; " \ 72 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 73 "if run loadfdt; then " \ 74 "bootz ${loadaddr} - ${fdt_addr}; " \ 75 "else " \ 76 "if test ${boot_fdt} = try; then " \ 77 "bootz; " \ 78 "else " \ 79 "echo WARN: Cannot load the DT; " \ 80 "fi; " \ 81 "fi; " \ 82 "else " \ 83 "bootz; " \ 84 "fi;\0" \ 85 "netargs=setenv bootargs console=${console},${baudrate} " \ 86 "root=/dev/nfs " \ 87 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 88 "netboot=echo Booting from net ...; " \ 89 "run netargs; " \ 90 "if test ${ip_dyn} = yes; then " \ 91 "setenv get_cmd dhcp; " \ 92 "else " \ 93 "setenv get_cmd tftp; " \ 94 "fi; " \ 95 "${get_cmd} ${image}; " \ 96 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 97 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 98 "bootz ${loadaddr} - ${fdt_addr}; " \ 99 "else " \ 100 "if test ${boot_fdt} = try; then " \ 101 "bootz; " \ 102 "else " \ 103 "echo WARN: Cannot load the DT; " \ 104 "fi; " \ 105 "fi; " \ 106 "else " \ 107 "bootz; " \ 108 "fi;\0" \ 109 "findfdt="\ 110 "if test test $board_rev = REVA ; then " \ 111 "setenv fdt_file imx6sx-sdb-reva.dtb; fi; " \ 112 113 #define CONFIG_BOOTCOMMAND \ 114 "run findfdt; " \ 115 "mmc dev ${mmcdev}; if mmc rescan; then " \ 116 "if run loadbootscript; then " \ 117 "run bootscript; " \ 118 "else " \ 119 "if run loadimage; then " \ 120 "run mmcboot; " \ 121 "else run netboot; " \ 122 "fi; " \ 123 "fi; " \ 124 "else run netboot; fi" 125 126 /* Miscellaneous configurable options */ 127 #define CONFIG_SYS_MEMTEST_START 0x80000000 128 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) 129 130 /* Physical Memory Map */ 131 #define CONFIG_NR_DRAM_BANKS 1 132 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 133 134 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 135 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 136 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 137 138 #define CONFIG_SYS_INIT_SP_OFFSET \ 139 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 140 #define CONFIG_SYS_INIT_SP_ADDR \ 141 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 142 143 /* MMC Configuration */ 144 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR 145 146 /* I2C Configs */ 147 #define CONFIG_SYS_I2C_MXC 148 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 149 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 150 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 151 #define CONFIG_SYS_I2C_SPEED 100000 152 153 /* Network */ 154 #define CONFIG_FEC_MXC 155 #define CONFIG_MII 156 157 #define IMX_FEC_BASE ENET_BASE_ADDR 158 #define CONFIG_FEC_MXC_PHYADDR 0x1 159 160 #define CONFIG_FEC_XCV_TYPE RGMII 161 #define CONFIG_ETHPRIME "FEC" 162 163 #define CONFIG_PHY_ATHEROS 164 165 #ifdef CONFIG_CMD_USB 166 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 167 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 168 #define CONFIG_MXC_USB_FLAGS 0 169 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 170 #endif 171 172 #ifdef CONFIG_CMD_PCI 173 #define CONFIG_PCI_SCAN_SHOW 174 #define CONFIG_PCIE_IMX 175 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) 176 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) 177 #endif 178 179 #define CONFIG_IMX_THERMAL 180 181 #ifdef CONFIG_FSL_QSPI 182 #define CONFIG_SYS_FSL_QSPI_LE 183 #define CONFIG_SYS_FSL_QSPI_AHB 184 #ifdef CONFIG_MX6SX_SABRESD_REVA 185 #define FSL_QSPI_FLASH_SIZE SZ_16M 186 #else 187 #define FSL_QSPI_FLASH_SIZE SZ_32M 188 #endif 189 #define FSL_QSPI_FLASH_NUM 2 190 #endif 191 192 #ifndef CONFIG_SPL_BUILD 193 #ifdef CONFIG_VIDEO 194 #define CONFIG_VIDEO_MXS 195 #define CONFIG_VIDEO_LOGO 196 #define CONFIG_SPLASH_SCREEN 197 #define CONFIG_SPLASH_SCREEN_ALIGN 198 #define CONFIG_BMP_16BPP 199 #define CONFIG_VIDEO_BMP_RLE8 200 #define CONFIG_VIDEO_BMP_LOGO 201 #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR 202 #endif 203 #endif 204 205 #define CONFIG_ENV_OFFSET (14 * SZ_64K) 206 #define CONFIG_ENV_SIZE SZ_8K 207 208 #define CONFIG_SYS_FSL_USDHC_NUM 3 209 #if defined(CONFIG_ENV_IS_IN_MMC) 210 #define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC4*/ 211 #endif 212 213 #endif /* __CONFIG_H */ 214