1 /*
2  * Copyright 2014 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Freescale i.MX6SX Sabresd board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 #include <asm/arch/imx-regs.h>
14 #include <linux/sizes.h>
15 #include "mx6_common.h"
16 
17 #define CONFIG_MX6
18 #define CONFIG_DISPLAY_CPUINFO
19 #define CONFIG_DISPLAY_BOARDINFO
20 
21 #ifdef CONFIG_SPL
22 #define CONFIG_SPL_LIBCOMMON_SUPPORT
23 #define CONFIG_SPL_MMC_SUPPORT
24 #include "imx6_spl.h"
25 #endif
26 
27 #define CONFIG_CMDLINE_TAG
28 #define CONFIG_SETUP_MEMORY_TAGS
29 #define CONFIG_INITRD_TAG
30 #define CONFIG_REVISION_TAG
31 #define CONFIG_SYS_GENERIC_BOARD
32 
33 /* Size of malloc() pool */
34 #define CONFIG_SYS_MALLOC_LEN		(3 * SZ_1M)
35 
36 #define CONFIG_BOARD_EARLY_INIT_F
37 #define CONFIG_MXC_GPIO
38 
39 #define CONFIG_MXC_UART
40 #define CONFIG_MXC_UART_BASE		UART1_BASE
41 
42 /* allow to overwrite serial and ethaddr */
43 #define CONFIG_ENV_OVERWRITE
44 #define CONFIG_CONS_INDEX		1
45 #define CONFIG_BAUDRATE			115200
46 
47 /* Command definition */
48 #include <config_cmd_default.h>
49 
50 #undef CONFIG_CMD_IMLS
51 
52 #define CONFIG_BOOTDELAY		3
53 
54 #define CONFIG_LOADADDR			0x80800000
55 #define CONFIG_SYS_TEXT_BASE		0x87800000
56 
57 #define CONFIG_EXTRA_ENV_SETTINGS \
58 	"script=boot.scr\0" \
59 	"image=zImage\0" \
60 	"console=ttymxc0\0" \
61 	"fdt_high=0xffffffff\0" \
62 	"initrd_high=0xffffffff\0" \
63 	"fdt_file=imx6sx-sdb.dtb\0" \
64 	"fdt_addr=0x88000000\0" \
65 	"boot_fdt=try\0" \
66 	"ip_dyn=yes\0" \
67 	"mmcdev=2\0" \
68 	"mmcpart=1\0" \
69 	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
70 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
71 		"root=${mmcroot}\0" \
72 	"loadbootscript=" \
73 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
74 	"bootscript=echo Running bootscript from mmc ...; " \
75 		"source\0" \
76 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
77 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
78 	"mmcboot=echo Booting from mmc ...; " \
79 		"run mmcargs; " \
80 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
81 			"if run loadfdt; then " \
82 				"bootz ${loadaddr} - ${fdt_addr}; " \
83 			"else " \
84 				"if test ${boot_fdt} = try; then " \
85 					"bootz; " \
86 				"else " \
87 					"echo WARN: Cannot load the DT; " \
88 				"fi; " \
89 			"fi; " \
90 		"else " \
91 			"bootz; " \
92 		"fi;\0" \
93 	"netargs=setenv bootargs console=${console},${baudrate} " \
94 		"root=/dev/nfs " \
95 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
96 		"netboot=echo Booting from net ...; " \
97 		"run netargs; " \
98 		"if test ${ip_dyn} = yes; then " \
99 			"setenv get_cmd dhcp; " \
100 		"else " \
101 			"setenv get_cmd tftp; " \
102 		"fi; " \
103 		"${get_cmd} ${image}; " \
104 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
105 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
106 				"bootz ${loadaddr} - ${fdt_addr}; " \
107 			"else " \
108 				"if test ${boot_fdt} = try; then " \
109 					"bootz; " \
110 				"else " \
111 					"echo WARN: Cannot load the DT; " \
112 				"fi; " \
113 			"fi; " \
114 		"else " \
115 			"bootz; " \
116 		"fi;\0"
117 
118 #define CONFIG_BOOTCOMMAND \
119 	   "mmc dev ${mmcdev};" \
120 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
121 		   "if run loadbootscript; then " \
122 			   "run bootscript; " \
123 		   "else " \
124 			   "if run loadimage; then " \
125 				   "run mmcboot; " \
126 			   "else run netboot; " \
127 			   "fi; " \
128 		   "fi; " \
129 	   "else run netboot; fi"
130 
131 /* Miscellaneous configurable options */
132 #define CONFIG_SYS_LONGHELP
133 #define CONFIG_SYS_HUSH_PARSER
134 #define CONFIG_AUTO_COMPLETE
135 #define CONFIG_SYS_CBSIZE		1024
136 
137 #define CONFIG_SYS_MAXARGS		256
138 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
139 
140 #define CONFIG_SYS_MEMTEST_START	0x80000000
141 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000)
142 
143 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
144 
145 #define CONFIG_CMDLINE_EDITING
146 #define CONFIG_STACKSIZE		SZ_128K
147 
148 /* Physical Memory Map */
149 #define CONFIG_NR_DRAM_BANKS		1
150 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
151 #define PHYS_SDRAM_SIZE			SZ_1G
152 
153 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
154 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
155 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
156 
157 #define CONFIG_SYS_INIT_SP_OFFSET \
158 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
159 #define CONFIG_SYS_INIT_SP_ADDR \
160 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
161 
162 /* MMC Configuration */
163 #define CONFIG_FSL_ESDHC
164 #define CONFIG_FSL_USDHC
165 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC4_BASE_ADDR
166 
167 #define CONFIG_MMC
168 #define CONFIG_CMD_MMC
169 #define CONFIG_GENERIC_MMC
170 #define CONFIG_BOUNCE_BUFFER
171 #define CONFIG_CMD_EXT2
172 #define CONFIG_CMD_FAT
173 #define CONFIG_DOS_PARTITION
174 
175 /* I2C Configs */
176 #define CONFIG_CMD_I2C
177 #define CONFIG_SYS_I2C
178 #define CONFIG_SYS_I2C_MXC
179 #define CONFIG_SYS_I2C_SPEED		  100000
180 
181 /* PMIC */
182 #define CONFIG_POWER
183 #define CONFIG_POWER_I2C
184 #define CONFIG_POWER_PFUZE100
185 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
186 
187 /* Network */
188 #define CONFIG_CMD_PING
189 #define CONFIG_CMD_DHCP
190 #define CONFIG_CMD_MII
191 #define CONFIG_CMD_NET
192 #define CONFIG_FEC_MXC
193 #define CONFIG_MII
194 
195 #define IMX_FEC_BASE			ENET_BASE_ADDR
196 #define CONFIG_FEC_MXC_PHYADDR          0x1
197 
198 #define CONFIG_FEC_XCV_TYPE             RGMII
199 #define CONFIG_ETHPRIME                 "FEC"
200 
201 #define CONFIG_PHYLIB
202 #define CONFIG_PHY_ATHEROS
203 
204 
205 #define CONFIG_CMD_USB
206 #ifdef CONFIG_CMD_USB
207 #define CONFIG_USB_EHCI
208 #define CONFIG_USB_EHCI_MX6
209 #define CONFIG_USB_STORAGE
210 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
211 #define CONFIG_USB_HOST_ETHER
212 #define CONFIG_USB_ETHER_ASIX
213 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
214 #define CONFIG_MXC_USB_FLAGS   0
215 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
216 #endif
217 
218 #define CONFIG_CMD_PCI
219 #ifdef CONFIG_CMD_PCI
220 #define CONFIG_PCI
221 #define CONFIG_PCI_PNP
222 #define CONFIG_PCI_SCAN_SHOW
223 #define CONFIG_PCIE_IMX
224 #define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(2, 0)
225 #define CONFIG_PCIE_IMX_POWER_GPIO	IMX_GPIO_NR(2, 1)
226 #endif
227 
228 #define CONFIG_IMX6_THERMAL
229 
230 #define CONFIG_CMD_FUSE
231 #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL)
232 #define CONFIG_MXC_OCOTP
233 #endif
234 
235 /* FLASH and environment organization */
236 #define CONFIG_SYS_NO_FLASH
237 
238 #define CONFIG_CMD_TIME
239 
240 #define CONFIG_FSL_QSPI
241 
242 #ifdef CONFIG_FSL_QSPI
243 #define CONFIG_CMD_SF
244 #define CONFIG_SPI_FLASH
245 #define CONFIG_SPI_FLASH_BAR
246 #define CONFIG_SPI_FLASH_SPANSION
247 #define CONFIG_SPI_FLASH_STMICRO
248 #define CONFIG_SYS_FSL_QSPI_LE
249 #define CONFIG_SYS_FSL_QSPI_AHB
250 #ifdef CONFIG_MX6SX_SABRESD_REVA
251 #define FSL_QSPI_FLASH_SIZE		SZ_16M
252 #else
253 #define FSL_QSPI_FLASH_SIZE		SZ_32M
254 #endif
255 #define FSL_QSPI_FLASH_NUM		2
256 #endif
257 
258 #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
259 #define CONFIG_ENV_SIZE			SZ_8K
260 #define CONFIG_ENV_IS_IN_MMC
261 
262 #define CONFIG_OF_LIBFDT
263 #define CONFIG_CMD_BOOTZ
264 
265 #ifndef CONFIG_SYS_DCACHE_OFF
266 #define CONFIG_CMD_CACHE
267 #endif
268 
269 #define CONFIG_SYS_FSL_USDHC_NUM	3
270 #if defined(CONFIG_ENV_IS_IN_MMC)
271 #define CONFIG_SYS_MMC_ENV_DEV		2  /*USDHC4*/
272 #endif
273 
274 #endif				/* __CONFIG_H */
275