1 /* 2 * Copyright 2014 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX6SX Sabresd board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "mx6_common.h" 13 14 #ifdef CONFIG_SPL 15 #define CONFIG_SPL_LIBCOMMON_SUPPORT 16 #define CONFIG_SPL_MMC_SUPPORT 17 #include "imx6_spl.h" 18 #endif 19 20 /* Size of malloc() pool */ 21 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) 22 23 #define CONFIG_BOARD_EARLY_INIT_F 24 25 #define CONFIG_MXC_UART 26 #define CONFIG_MXC_UART_BASE UART1_BASE 27 28 #ifdef CONFIG_IMX_BOOTAUX 29 /* Set to QSPI2 B flash at default */ 30 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000 31 32 #define UPDATE_M4_ENV \ 33 "m4image=m4_qspi.bin\0" \ 34 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \ 35 "update_m4_from_sd=" \ 36 "if sf probe 1:0; then " \ 37 "if run loadm4image; then " \ 38 "setexpr fw_sz ${filesize} + 0xffff; " \ 39 "setexpr fw_sz ${fw_sz} / 0x10000; " \ 40 "setexpr fw_sz ${fw_sz} * 0x10000; " \ 41 "sf erase 0x0 ${fw_sz}; " \ 42 "sf write ${loadaddr} 0x0 ${filesize}; " \ 43 "fi; " \ 44 "fi\0" \ 45 "m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" 46 #else 47 #define UPDATE_M4_ENV "" 48 #endif 49 50 #define CONFIG_EXTRA_ENV_SETTINGS \ 51 UPDATE_M4_ENV \ 52 "script=boot.scr\0" \ 53 "image=zImage\0" \ 54 "console=ttymxc0\0" \ 55 "fdt_high=0xffffffff\0" \ 56 "initrd_high=0xffffffff\0" \ 57 "fdt_file=imx6sx-sdb.dtb\0" \ 58 "fdt_addr=0x88000000\0" \ 59 "boot_fdt=try\0" \ 60 "ip_dyn=yes\0" \ 61 "videomode=video=ctfb:x:800,y:480,depth:24,pclk:29850,le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0\0" \ 62 "mmcdev=2\0" \ 63 "mmcpart=1\0" \ 64 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 65 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 66 "root=${mmcroot}\0" \ 67 "loadbootscript=" \ 68 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 69 "bootscript=echo Running bootscript from mmc ...; " \ 70 "source\0" \ 71 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 72 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 73 "mmcboot=echo Booting from mmc ...; " \ 74 "run mmcargs; " \ 75 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 76 "if run loadfdt; then " \ 77 "bootz ${loadaddr} - ${fdt_addr}; " \ 78 "else " \ 79 "if test ${boot_fdt} = try; then " \ 80 "bootz; " \ 81 "else " \ 82 "echo WARN: Cannot load the DT; " \ 83 "fi; " \ 84 "fi; " \ 85 "else " \ 86 "bootz; " \ 87 "fi;\0" \ 88 "netargs=setenv bootargs console=${console},${baudrate} " \ 89 "root=/dev/nfs " \ 90 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 91 "netboot=echo Booting from net ...; " \ 92 "run netargs; " \ 93 "if test ${ip_dyn} = yes; then " \ 94 "setenv get_cmd dhcp; " \ 95 "else " \ 96 "setenv get_cmd tftp; " \ 97 "fi; " \ 98 "${get_cmd} ${image}; " \ 99 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 100 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 101 "bootz ${loadaddr} - ${fdt_addr}; " \ 102 "else " \ 103 "if test ${boot_fdt} = try; then " \ 104 "bootz; " \ 105 "else " \ 106 "echo WARN: Cannot load the DT; " \ 107 "fi; " \ 108 "fi; " \ 109 "else " \ 110 "bootz; " \ 111 "fi;\0" 112 113 #define CONFIG_BOOTCOMMAND \ 114 "mmc dev ${mmcdev};" \ 115 "mmc dev ${mmcdev}; if mmc rescan; then " \ 116 "if run loadbootscript; then " \ 117 "run bootscript; " \ 118 "else " \ 119 "if run loadimage; then " \ 120 "run mmcboot; " \ 121 "else run netboot; " \ 122 "fi; " \ 123 "fi; " \ 124 "else run netboot; fi" 125 126 /* Miscellaneous configurable options */ 127 #define CONFIG_SYS_MEMTEST_START 0x80000000 128 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) 129 130 #define CONFIG_STACKSIZE SZ_128K 131 132 /* Physical Memory Map */ 133 #define CONFIG_NR_DRAM_BANKS 1 134 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 135 #define PHYS_SDRAM_SIZE SZ_1G 136 137 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 138 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 139 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 140 141 #define CONFIG_SYS_INIT_SP_OFFSET \ 142 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 143 #define CONFIG_SYS_INIT_SP_ADDR \ 144 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 145 146 /* MMC Configuration */ 147 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR 148 149 /* I2C Configs */ 150 #define CONFIG_SYS_I2C 151 #define CONFIG_SYS_I2C_MXC 152 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 153 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 154 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 155 #define CONFIG_SYS_I2C_SPEED 100000 156 157 /* PMIC */ 158 #define CONFIG_POWER 159 #define CONFIG_POWER_I2C 160 #define CONFIG_POWER_PFUZE100 161 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 162 163 /* Network */ 164 #define CONFIG_FEC_MXC 165 #define CONFIG_MII 166 167 #define IMX_FEC_BASE ENET_BASE_ADDR 168 #define CONFIG_FEC_MXC_PHYADDR 0x1 169 170 #define CONFIG_FEC_XCV_TYPE RGMII 171 #define CONFIG_ETHPRIME "FEC" 172 173 #define CONFIG_PHYLIB 174 #define CONFIG_PHY_ATHEROS 175 176 #ifdef CONFIG_CMD_USB 177 #define CONFIG_USB_EHCI 178 #define CONFIG_USB_EHCI_MX6 179 #define CONFIG_USB_STORAGE 180 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 181 #define CONFIG_USB_HOST_ETHER 182 #define CONFIG_USB_ETHER_ASIX 183 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 184 #define CONFIG_MXC_USB_FLAGS 0 185 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 186 #endif 187 188 #define CONFIG_CMD_PCI 189 #ifdef CONFIG_CMD_PCI 190 #define CONFIG_PCI 191 #define CONFIG_PCI_PNP 192 #define CONFIG_PCI_SCAN_SHOW 193 #define CONFIG_PCIE_IMX 194 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) 195 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) 196 #endif 197 198 #define CONFIG_IMX_THERMAL 199 200 #ifdef CONFIG_FSL_QSPI 201 #define CONFIG_SYS_FSL_QSPI_LE 202 #define CONFIG_SYS_FSL_QSPI_AHB 203 #ifdef CONFIG_MX6SX_SABRESD_REVA 204 #define FSL_QSPI_FLASH_SIZE SZ_16M 205 #else 206 #define FSL_QSPI_FLASH_SIZE SZ_32M 207 #endif 208 #define FSL_QSPI_FLASH_NUM 2 209 #endif 210 211 #ifndef CONFIG_SPL_BUILD 212 #define CONFIG_VIDEO 213 #ifdef CONFIG_VIDEO 214 #define CONFIG_CFB_CONSOLE 215 #define CONFIG_VIDEO_MXS 216 #define CONFIG_VIDEO_LOGO 217 #define CONFIG_VIDEO_SW_CURSOR 218 #define CONFIG_VGA_AS_SINGLE_DEVICE 219 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 220 #define CONFIG_SPLASH_SCREEN 221 #define CONFIG_SPLASH_SCREEN_ALIGN 222 #define CONFIG_CMD_BMP 223 #define CONFIG_BMP_16BPP 224 #define CONFIG_VIDEO_BMP_RLE8 225 #define CONFIG_VIDEO_BMP_LOGO 226 #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR 227 #endif 228 #endif 229 230 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 231 #define CONFIG_ENV_SIZE SZ_8K 232 #define CONFIG_ENV_IS_IN_MMC 233 234 #define CONFIG_SYS_FSL_USDHC_NUM 3 235 #if defined(CONFIG_ENV_IS_IN_MMC) 236 #define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC4*/ 237 #endif 238 239 #endif /* __CONFIG_H */ 240