1 /* 2 * Copyright 2014 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX6SX Sabresd board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #include "mx6_common.h" 14 15 #ifdef CONFIG_SPL 16 #define CONFIG_SPL_LIBCOMMON_SUPPORT 17 #define CONFIG_SPL_MMC_SUPPORT 18 #include "imx6_spl.h" 19 #endif 20 21 /* Size of malloc() pool */ 22 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) 23 24 #define CONFIG_BOARD_EARLY_INIT_F 25 26 #define CONFIG_MXC_UART 27 #define CONFIG_MXC_UART_BASE UART1_BASE 28 29 #define CONFIG_EXTRA_ENV_SETTINGS \ 30 "script=boot.scr\0" \ 31 "image=zImage\0" \ 32 "console=ttymxc0\0" \ 33 "fdt_high=0xffffffff\0" \ 34 "initrd_high=0xffffffff\0" \ 35 "fdt_file=imx6sx-sdb.dtb\0" \ 36 "fdt_addr=0x88000000\0" \ 37 "boot_fdt=try\0" \ 38 "ip_dyn=yes\0" \ 39 "mmcdev=2\0" \ 40 "mmcpart=1\0" \ 41 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 42 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 43 "root=${mmcroot}\0" \ 44 "loadbootscript=" \ 45 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 46 "bootscript=echo Running bootscript from mmc ...; " \ 47 "source\0" \ 48 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 49 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 50 "mmcboot=echo Booting from mmc ...; " \ 51 "run mmcargs; " \ 52 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 53 "if run loadfdt; then " \ 54 "bootz ${loadaddr} - ${fdt_addr}; " \ 55 "else " \ 56 "if test ${boot_fdt} = try; then " \ 57 "bootz; " \ 58 "else " \ 59 "echo WARN: Cannot load the DT; " \ 60 "fi; " \ 61 "fi; " \ 62 "else " \ 63 "bootz; " \ 64 "fi;\0" \ 65 "netargs=setenv bootargs console=${console},${baudrate} " \ 66 "root=/dev/nfs " \ 67 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 68 "netboot=echo Booting from net ...; " \ 69 "run netargs; " \ 70 "if test ${ip_dyn} = yes; then " \ 71 "setenv get_cmd dhcp; " \ 72 "else " \ 73 "setenv get_cmd tftp; " \ 74 "fi; " \ 75 "${get_cmd} ${image}; " \ 76 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 77 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 78 "bootz ${loadaddr} - ${fdt_addr}; " \ 79 "else " \ 80 "if test ${boot_fdt} = try; then " \ 81 "bootz; " \ 82 "else " \ 83 "echo WARN: Cannot load the DT; " \ 84 "fi; " \ 85 "fi; " \ 86 "else " \ 87 "bootz; " \ 88 "fi;\0" 89 90 #define CONFIG_BOOTCOMMAND \ 91 "mmc dev ${mmcdev};" \ 92 "mmc dev ${mmcdev}; if mmc rescan; then " \ 93 "if run loadbootscript; then " \ 94 "run bootscript; " \ 95 "else " \ 96 "if run loadimage; then " \ 97 "run mmcboot; " \ 98 "else run netboot; " \ 99 "fi; " \ 100 "fi; " \ 101 "else run netboot; fi" 102 103 /* Miscellaneous configurable options */ 104 #define CONFIG_SYS_MEMTEST_START 0x80000000 105 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) 106 107 #define CONFIG_STACKSIZE SZ_128K 108 109 /* Physical Memory Map */ 110 #define CONFIG_NR_DRAM_BANKS 1 111 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 112 #define PHYS_SDRAM_SIZE SZ_1G 113 114 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 115 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 116 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 117 118 #define CONFIG_SYS_INIT_SP_OFFSET \ 119 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 120 #define CONFIG_SYS_INIT_SP_ADDR \ 121 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 122 123 /* MMC Configuration */ 124 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR 125 126 /* I2C Configs */ 127 #define CONFIG_CMD_I2C 128 #define CONFIG_SYS_I2C 129 #define CONFIG_SYS_I2C_MXC 130 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 131 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 132 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 133 #define CONFIG_SYS_I2C_SPEED 100000 134 135 /* PMIC */ 136 #define CONFIG_POWER 137 #define CONFIG_POWER_I2C 138 #define CONFIG_POWER_PFUZE100 139 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 140 141 /* Network */ 142 #define CONFIG_CMD_PING 143 #define CONFIG_CMD_DHCP 144 #define CONFIG_CMD_MII 145 #define CONFIG_FEC_MXC 146 #define CONFIG_MII 147 148 #define IMX_FEC_BASE ENET_BASE_ADDR 149 #define CONFIG_FEC_MXC_PHYADDR 0x1 150 151 #define CONFIG_FEC_XCV_TYPE RGMII 152 #define CONFIG_ETHPRIME "FEC" 153 154 #define CONFIG_PHYLIB 155 #define CONFIG_PHY_ATHEROS 156 157 158 #define CONFIG_CMD_USB 159 #ifdef CONFIG_CMD_USB 160 #define CONFIG_USB_EHCI 161 #define CONFIG_USB_EHCI_MX6 162 #define CONFIG_USB_STORAGE 163 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 164 #define CONFIG_USB_HOST_ETHER 165 #define CONFIG_USB_ETHER_ASIX 166 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 167 #define CONFIG_MXC_USB_FLAGS 0 168 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 169 #endif 170 171 #define CONFIG_CMD_PCI 172 #ifdef CONFIG_CMD_PCI 173 #define CONFIG_PCI 174 #define CONFIG_PCI_PNP 175 #define CONFIG_PCI_SCAN_SHOW 176 #define CONFIG_PCIE_IMX 177 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) 178 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) 179 #endif 180 181 #define CONFIG_IMX_THERMAL 182 183 #define CONFIG_CMD_TIME 184 185 186 #ifdef CONFIG_FSL_QSPI 187 #define CONFIG_CMD_SF 188 #define CONFIG_SYS_FSL_QSPI_LE 189 #define CONFIG_SYS_FSL_QSPI_AHB 190 #ifdef CONFIG_MX6SX_SABRESD_REVA 191 #define FSL_QSPI_FLASH_SIZE SZ_16M 192 #else 193 #define FSL_QSPI_FLASH_SIZE SZ_32M 194 #endif 195 #define FSL_QSPI_FLASH_NUM 2 196 #endif 197 198 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 199 #define CONFIG_ENV_SIZE SZ_8K 200 #define CONFIG_ENV_IS_IN_MMC 201 202 #define CONFIG_SYS_FSL_USDHC_NUM 3 203 #if defined(CONFIG_ENV_IS_IN_MMC) 204 #define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC4*/ 205 #endif 206 207 #endif /* __CONFIG_H */ 208