1 /*
2  * Copyright 2014 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Freescale i.MX6SX Sabresd board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 #include "mx6_common.h"
14 
15 #ifdef CONFIG_SPL
16 #define CONFIG_SPL_LIBCOMMON_SUPPORT
17 #define CONFIG_SPL_MMC_SUPPORT
18 #define CONFIG_SPL_FAT_SUPPORT
19 #include "imx6_spl.h"
20 #endif
21 
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN		(3 * SZ_1M)
24 
25 #define CONFIG_BOARD_EARLY_INIT_F
26 
27 #define CONFIG_MXC_UART
28 #define CONFIG_MXC_UART_BASE		UART1_BASE
29 
30 #define CONFIG_EXTRA_ENV_SETTINGS \
31 	"script=boot.scr\0" \
32 	"image=zImage\0" \
33 	"console=ttymxc0\0" \
34 	"fdt_high=0xffffffff\0" \
35 	"initrd_high=0xffffffff\0" \
36 	"fdt_file=imx6sx-sdb.dtb\0" \
37 	"fdt_addr=0x88000000\0" \
38 	"boot_fdt=try\0" \
39 	"ip_dyn=yes\0" \
40 	"mmcdev=2\0" \
41 	"mmcpart=1\0" \
42 	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
43 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
44 		"root=${mmcroot}\0" \
45 	"loadbootscript=" \
46 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
47 	"bootscript=echo Running bootscript from mmc ...; " \
48 		"source\0" \
49 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
50 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
51 	"mmcboot=echo Booting from mmc ...; " \
52 		"run mmcargs; " \
53 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
54 			"if run loadfdt; then " \
55 				"bootz ${loadaddr} - ${fdt_addr}; " \
56 			"else " \
57 				"if test ${boot_fdt} = try; then " \
58 					"bootz; " \
59 				"else " \
60 					"echo WARN: Cannot load the DT; " \
61 				"fi; " \
62 			"fi; " \
63 		"else " \
64 			"bootz; " \
65 		"fi;\0" \
66 	"netargs=setenv bootargs console=${console},${baudrate} " \
67 		"root=/dev/nfs " \
68 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
69 		"netboot=echo Booting from net ...; " \
70 		"run netargs; " \
71 		"if test ${ip_dyn} = yes; then " \
72 			"setenv get_cmd dhcp; " \
73 		"else " \
74 			"setenv get_cmd tftp; " \
75 		"fi; " \
76 		"${get_cmd} ${image}; " \
77 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
78 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
79 				"bootz ${loadaddr} - ${fdt_addr}; " \
80 			"else " \
81 				"if test ${boot_fdt} = try; then " \
82 					"bootz; " \
83 				"else " \
84 					"echo WARN: Cannot load the DT; " \
85 				"fi; " \
86 			"fi; " \
87 		"else " \
88 			"bootz; " \
89 		"fi;\0"
90 
91 #define CONFIG_BOOTCOMMAND \
92 	   "mmc dev ${mmcdev};" \
93 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
94 		   "if run loadbootscript; then " \
95 			   "run bootscript; " \
96 		   "else " \
97 			   "if run loadimage; then " \
98 				   "run mmcboot; " \
99 			   "else run netboot; " \
100 			   "fi; " \
101 		   "fi; " \
102 	   "else run netboot; fi"
103 
104 /* Miscellaneous configurable options */
105 #define CONFIG_SYS_MEMTEST_START	0x80000000
106 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000)
107 
108 #define CONFIG_STACKSIZE		SZ_128K
109 
110 /* Physical Memory Map */
111 #define CONFIG_NR_DRAM_BANKS		1
112 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
113 #define PHYS_SDRAM_SIZE			SZ_1G
114 
115 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
116 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
117 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
118 
119 #define CONFIG_SYS_INIT_SP_OFFSET \
120 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
121 #define CONFIG_SYS_INIT_SP_ADDR \
122 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
123 
124 /* MMC Configuration */
125 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC4_BASE_ADDR
126 
127 /* I2C Configs */
128 #define CONFIG_CMD_I2C
129 #define CONFIG_SYS_I2C
130 #define CONFIG_SYS_I2C_MXC
131 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
132 #define CONFIG_SYS_I2C_SPEED		  100000
133 
134 /* PMIC */
135 #define CONFIG_POWER
136 #define CONFIG_POWER_I2C
137 #define CONFIG_POWER_PFUZE100
138 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
139 
140 /* Network */
141 #define CONFIG_CMD_PING
142 #define CONFIG_CMD_DHCP
143 #define CONFIG_CMD_MII
144 #define CONFIG_FEC_MXC
145 #define CONFIG_MII
146 
147 #define IMX_FEC_BASE			ENET_BASE_ADDR
148 #define CONFIG_FEC_MXC_PHYADDR          0x1
149 
150 #define CONFIG_FEC_XCV_TYPE             RGMII
151 #define CONFIG_ETHPRIME                 "FEC"
152 
153 #define CONFIG_PHYLIB
154 #define CONFIG_PHY_ATHEROS
155 
156 
157 #define CONFIG_CMD_USB
158 #ifdef CONFIG_CMD_USB
159 #define CONFIG_USB_EHCI
160 #define CONFIG_USB_EHCI_MX6
161 #define CONFIG_USB_STORAGE
162 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
163 #define CONFIG_USB_HOST_ETHER
164 #define CONFIG_USB_ETHER_ASIX
165 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
166 #define CONFIG_MXC_USB_FLAGS   0
167 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
168 #endif
169 
170 #define CONFIG_CMD_PCI
171 #ifdef CONFIG_CMD_PCI
172 #define CONFIG_PCI
173 #define CONFIG_PCI_PNP
174 #define CONFIG_PCI_SCAN_SHOW
175 #define CONFIG_PCIE_IMX
176 #define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(2, 0)
177 #define CONFIG_PCIE_IMX_POWER_GPIO	IMX_GPIO_NR(2, 1)
178 #endif
179 
180 #define CONFIG_IMX6_THERMAL
181 
182 #define CONFIG_CMD_TIME
183 
184 #define CONFIG_FSL_QSPI
185 
186 #ifdef CONFIG_FSL_QSPI
187 #define CONFIG_CMD_SF
188 #define CONFIG_SPI_FLASH_SPANSION
189 #define CONFIG_SPI_FLASH_STMICRO
190 #define CONFIG_SYS_FSL_QSPI_LE
191 #define CONFIG_SYS_FSL_QSPI_AHB
192 #ifdef CONFIG_MX6SX_SABRESD_REVA
193 #define FSL_QSPI_FLASH_SIZE		SZ_16M
194 #else
195 #define FSL_QSPI_FLASH_SIZE		SZ_32M
196 #endif
197 #define FSL_QSPI_FLASH_NUM		2
198 #endif
199 
200 #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
201 #define CONFIG_ENV_SIZE			SZ_8K
202 #define CONFIG_ENV_IS_IN_MMC
203 
204 #define CONFIG_SYS_FSL_USDHC_NUM	3
205 #if defined(CONFIG_ENV_IS_IN_MMC)
206 #define CONFIG_SYS_MMC_ENV_DEV		2  /*USDHC4*/
207 #endif
208 
209 #endif				/* __CONFIG_H */
210