1 /*
2  * Copyright 2014 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Freescale i.MX6SX Sabresd board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 #include <asm/arch/imx-regs.h>
14 #include <linux/sizes.h>
15 #include "mx6_common.h"
16 
17 #define CONFIG_MX6
18 #define CONFIG_DISPLAY_CPUINFO
19 #define CONFIG_DISPLAY_BOARDINFO
20 
21 #define CONFIG_CMDLINE_TAG
22 #define CONFIG_SETUP_MEMORY_TAGS
23 #define CONFIG_INITRD_TAG
24 #define CONFIG_REVISION_TAG
25 #define CONFIG_SYS_GENERIC_BOARD
26 
27 /* Size of malloc() pool */
28 #define CONFIG_SYS_MALLOC_LEN		(3 * SZ_1M)
29 
30 #define CONFIG_BOARD_EARLY_INIT_F
31 #define CONFIG_BOARD_LATE_INIT
32 #define CONFIG_MXC_GPIO
33 
34 #define CONFIG_MXC_UART
35 #define CONFIG_MXC_UART_BASE		UART1_BASE
36 
37 /* allow to overwrite serial and ethaddr */
38 #define CONFIG_ENV_OVERWRITE
39 #define CONFIG_CONS_INDEX		1
40 #define CONFIG_BAUDRATE			115200
41 
42 /* Command definition */
43 #include <config_cmd_default.h>
44 
45 #undef CONFIG_CMD_IMLS
46 
47 #define CONFIG_BOOTDELAY		3
48 
49 #define CONFIG_LOADADDR			0x80800000
50 #define CONFIG_SYS_TEXT_BASE		0x87800000
51 
52 #define CONFIG_EXTRA_ENV_SETTINGS \
53 	"script=boot.scr\0" \
54 	"image=zImage\0" \
55 	"console=ttymxc0\0" \
56 	"fdt_high=0xffffffff\0" \
57 	"initrd_high=0xffffffff\0" \
58 	"fdt_file=imx6sx-sdb.dtb\0" \
59 	"fdt_addr=0x88000000\0" \
60 	"boot_fdt=try\0" \
61 	"ip_dyn=yes\0" \
62 	"mmcdev=2\0" \
63 	"mmcpart=1\0" \
64 	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
65 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
66 		"root=${mmcroot}\0" \
67 	"loadbootscript=" \
68 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
69 	"bootscript=echo Running bootscript from mmc ...; " \
70 		"source\0" \
71 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
72 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
73 	"mmcboot=echo Booting from mmc ...; " \
74 		"run mmcargs; " \
75 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
76 			"if run loadfdt; then " \
77 				"bootz ${loadaddr} - ${fdt_addr}; " \
78 			"else " \
79 				"if test ${boot_fdt} = try; then " \
80 					"bootz; " \
81 				"else " \
82 					"echo WARN: Cannot load the DT; " \
83 				"fi; " \
84 			"fi; " \
85 		"else " \
86 			"bootz; " \
87 		"fi;\0" \
88 	"netargs=setenv bootargs console=${console},${baudrate} " \
89 		"root=/dev/nfs " \
90 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
91 		"netboot=echo Booting from net ...; " \
92 		"run netargs; " \
93 		"if test ${ip_dyn} = yes; then " \
94 			"setenv get_cmd dhcp; " \
95 		"else " \
96 			"setenv get_cmd tftp; " \
97 		"fi; " \
98 		"${get_cmd} ${image}; " \
99 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
100 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
101 				"bootz ${loadaddr} - ${fdt_addr}; " \
102 			"else " \
103 				"if test ${boot_fdt} = try; then " \
104 					"bootz; " \
105 				"else " \
106 					"echo WARN: Cannot load the DT; " \
107 				"fi; " \
108 			"fi; " \
109 		"else " \
110 			"bootz; " \
111 		"fi;\0"
112 
113 #define CONFIG_BOOTCOMMAND \
114 	   "mmc dev ${mmcdev};" \
115 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
116 		   "if run loadbootscript; then " \
117 			   "run bootscript; " \
118 		   "else " \
119 			   "if run loadimage; then " \
120 				   "run mmcboot; " \
121 			   "else run netboot; " \
122 			   "fi; " \
123 		   "fi; " \
124 	   "else run netboot; fi"
125 
126 /* Miscellaneous configurable options */
127 #define CONFIG_SYS_LONGHELP
128 #define CONFIG_SYS_HUSH_PARSER
129 #define CONFIG_AUTO_COMPLETE
130 #define CONFIG_SYS_CBSIZE		1024
131 
132 /* Print Buffer Size */
133 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
134 #define CONFIG_SYS_MAXARGS		256
135 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
136 
137 #define CONFIG_SYS_MEMTEST_START	0x80000000
138 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000)
139 
140 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
141 
142 #define CONFIG_CMDLINE_EDITING
143 #define CONFIG_STACKSIZE		SZ_128K
144 
145 /* Physical Memory Map */
146 #define CONFIG_NR_DRAM_BANKS		1
147 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
148 #define PHYS_SDRAM_SIZE			SZ_1G
149 
150 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
151 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
152 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
153 
154 #define CONFIG_SYS_INIT_SP_OFFSET \
155 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
156 #define CONFIG_SYS_INIT_SP_ADDR \
157 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
158 
159 /* MMC Configuration */
160 #define CONFIG_FSL_ESDHC
161 #define CONFIG_FSL_USDHC
162 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC4_BASE_ADDR
163 
164 #define CONFIG_MMC
165 #define CONFIG_CMD_MMC
166 #define CONFIG_GENERIC_MMC
167 #define CONFIG_BOUNCE_BUFFER
168 #define CONFIG_CMD_EXT2
169 #define CONFIG_CMD_FAT
170 #define CONFIG_DOS_PARTITION
171 
172 /* I2C Configs */
173 #define CONFIG_CMD_I2C
174 #define CONFIG_SYS_I2C
175 #define CONFIG_SYS_I2C_MXC
176 #define CONFIG_SYS_I2C_SPEED		  100000
177 
178 /* PMIC */
179 #define CONFIG_POWER
180 #define CONFIG_POWER_I2C
181 #define CONFIG_POWER_PFUZE100
182 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
183 
184 /* Network */
185 #define CONFIG_CMD_PING
186 #define CONFIG_CMD_DHCP
187 #define CONFIG_CMD_MII
188 #define CONFIG_CMD_NET
189 #define CONFIG_FEC_MXC
190 #define CONFIG_MII
191 
192 #define IMX_FEC_BASE			ENET_BASE_ADDR
193 #define CONFIG_FEC_MXC_PHYADDR          0x1
194 
195 #define CONFIG_FEC_XCV_TYPE             RGMII
196 #define CONFIG_ETHPRIME                 "FEC"
197 
198 #define CONFIG_PHYLIB
199 #define CONFIG_PHY_ATHEROS
200 
201 
202 #define CONFIG_CMD_USB
203 #ifdef CONFIG_CMD_USB
204 #define CONFIG_USB_EHCI
205 #define CONFIG_USB_EHCI_MX6
206 #define CONFIG_USB_STORAGE
207 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
208 #define CONFIG_USB_HOST_ETHER
209 #define CONFIG_USB_ETHER_ASIX
210 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
211 #define CONFIG_MXC_USB_FLAGS   0
212 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
213 #endif
214 
215 #define CONFIG_CMD_PCI
216 #ifdef CONFIG_CMD_PCI
217 #define CONFIG_PCI
218 #define CONFIG_PCI_PNP
219 #define CONFIG_PCI_SCAN_SHOW
220 #define CONFIG_PCIE_IMX
221 #define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(2, 0)
222 #define CONFIG_PCIE_IMX_POWER_GPIO	IMX_GPIO_NR(2, 1)
223 #endif
224 
225 #define CONFIG_DM
226 #define CONFIG_DM_THERMAL
227 #define CONFIG_SYS_MALLOC_F_LEN	(1 << 10)
228 #define CONFIG_IMX6_THERMAL
229 
230 #define CONFIG_CMD_FUSE
231 #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL)
232 #define CONFIG_MXC_OCOTP
233 #endif
234 
235 /* FLASH and environment organization */
236 #define CONFIG_SYS_NO_FLASH
237 
238 #define CONFIG_CMD_TIME
239 
240 #define CONFIG_FSL_QSPI
241 
242 #ifdef CONFIG_FSL_QSPI
243 #define CONFIG_CMD_SF
244 #define CONFIG_SPI_FLASH
245 #define CONFIG_SPI_FLASH_BAR
246 #define CONFIG_SPI_FLASH_SPANSION
247 #define CONFIG_SPI_FLASH_STMICRO
248 #define CONFIG_SYS_FSL_QSPI_LE
249 #define CONFIG_SYS_FSL_QSPI_AHB
250 #ifdef CONFIG_MX6SX_SABRESD_REVA
251 #define FSL_QSPI_FLASH_SIZE		SZ_16M
252 #else
253 #define FSL_QSPI_FLASH_SIZE		SZ_32M
254 #endif
255 #define FSL_QSPI_FLASH_NUM		2
256 #endif
257 
258 #define CONFIG_ENV_OFFSET		(6 * SZ_64K)
259 #define CONFIG_ENV_SIZE			SZ_8K
260 #define CONFIG_ENV_IS_IN_MMC
261 
262 #define CONFIG_OF_LIBFDT
263 #define CONFIG_CMD_BOOTZ
264 
265 #ifndef CONFIG_SYS_DCACHE_OFF
266 #define CONFIG_CMD_CACHE
267 #endif
268 
269 #define CONFIG_SYS_FSL_USDHC_NUM	3
270 #if defined(CONFIG_ENV_IS_IN_MMC)
271 #define CONFIG_SYS_MMC_ENV_DEV		2  /*USDHC4*/
272 #endif
273 
274 #endif				/* __CONFIG_H */
275