1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2014 Freescale Semiconductor, Inc. 4 * 5 * Configuration settings for the Freescale i.MX6SX Sabresd board. 6 */ 7 8 #ifndef __CONFIG_H 9 #define __CONFIG_H 10 11 #include "mx6_common.h" 12 13 #ifdef CONFIG_SPL 14 #include "imx6_spl.h" 15 #endif 16 17 /* Size of malloc() pool */ 18 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) 19 20 #define CONFIG_MXC_UART 21 #define CONFIG_MXC_UART_BASE UART1_BASE 22 23 #ifdef CONFIG_IMX_BOOTAUX 24 /* Set to QSPI2 B flash at default */ 25 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000 26 27 #define UPDATE_M4_ENV \ 28 "m4image=m4_qspi.bin\0" \ 29 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \ 30 "update_m4_from_sd=" \ 31 "if sf probe 1:0; then " \ 32 "if run loadm4image; then " \ 33 "setexpr fw_sz ${filesize} + 0xffff; " \ 34 "setexpr fw_sz ${fw_sz} / 0x10000; " \ 35 "setexpr fw_sz ${fw_sz} * 0x10000; " \ 36 "sf erase 0x0 ${fw_sz}; " \ 37 "sf write ${loadaddr} 0x0 ${filesize}; " \ 38 "fi; " \ 39 "fi\0" \ 40 "m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" 41 #else 42 #define UPDATE_M4_ENV "" 43 #endif 44 45 #define CONFIG_EXTRA_ENV_SETTINGS \ 46 UPDATE_M4_ENV \ 47 "script=boot.scr\0" \ 48 "image=zImage\0" \ 49 "console=ttymxc0\0" \ 50 "fdt_high=0xffffffff\0" \ 51 "initrd_high=0xffffffff\0" \ 52 "fdt_file=imx6sx-sdb.dtb\0" \ 53 "fdt_addr=0x88000000\0" \ 54 "boot_fdt=try\0" \ 55 "ip_dyn=yes\0" \ 56 "videomode=video=ctfb:x:800,y:480,depth:24,pclk:29850,le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0\0" \ 57 "mmcdev=2\0" \ 58 "mmcpart=1\0" \ 59 "finduuid=part uuid mmc 2:2 uuid\0" \ 60 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 61 "root=PARTUUID=${uuid} rootwait rw\0" \ 62 "loadbootscript=" \ 63 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 64 "bootscript=echo Running bootscript from mmc ...; " \ 65 "source\0" \ 66 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 67 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 68 "mmcboot=echo Booting from mmc ...; " \ 69 "run finduuid; " \ 70 "run mmcargs; " \ 71 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 72 "if run loadfdt; then " \ 73 "bootz ${loadaddr} - ${fdt_addr}; " \ 74 "else " \ 75 "if test ${boot_fdt} = try; then " \ 76 "bootz; " \ 77 "else " \ 78 "echo WARN: Cannot load the DT; " \ 79 "fi; " \ 80 "fi; " \ 81 "else " \ 82 "bootz; " \ 83 "fi;\0" \ 84 "netargs=setenv bootargs console=${console},${baudrate} " \ 85 "root=/dev/nfs " \ 86 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 87 "netboot=echo Booting from net ...; " \ 88 "run netargs; " \ 89 "if test ${ip_dyn} = yes; then " \ 90 "setenv get_cmd dhcp; " \ 91 "else " \ 92 "setenv get_cmd tftp; " \ 93 "fi; " \ 94 "${get_cmd} ${image}; " \ 95 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 96 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 97 "bootz ${loadaddr} - ${fdt_addr}; " \ 98 "else " \ 99 "if test ${boot_fdt} = try; then " \ 100 "bootz; " \ 101 "else " \ 102 "echo WARN: Cannot load the DT; " \ 103 "fi; " \ 104 "fi; " \ 105 "else " \ 106 "bootz; " \ 107 "fi;\0" \ 108 "findfdt="\ 109 "if test test $board_rev = REVA ; then " \ 110 "setenv fdt_file imx6sx-sdb-reva.dtb; fi; " \ 111 112 #define CONFIG_BOOTCOMMAND \ 113 "run findfdt; " \ 114 "mmc dev ${mmcdev}; if mmc rescan; then " \ 115 "if run loadbootscript; then " \ 116 "run bootscript; " \ 117 "else " \ 118 "if run loadimage; then " \ 119 "run mmcboot; " \ 120 "else run netboot; " \ 121 "fi; " \ 122 "fi; " \ 123 "else run netboot; fi" 124 125 /* Miscellaneous configurable options */ 126 #define CONFIG_SYS_MEMTEST_START 0x80000000 127 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) 128 129 /* Physical Memory Map */ 130 #define CONFIG_NR_DRAM_BANKS 1 131 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 132 133 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 134 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 135 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 136 137 #define CONFIG_SYS_INIT_SP_OFFSET \ 138 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 139 #define CONFIG_SYS_INIT_SP_ADDR \ 140 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 141 142 /* MMC Configuration */ 143 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR 144 145 /* I2C Configs */ 146 #define CONFIG_SYS_I2C_MXC 147 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 148 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 149 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 150 #define CONFIG_SYS_I2C_SPEED 100000 151 152 /* Network */ 153 #define CONFIG_FEC_MXC 154 #define CONFIG_MII 155 156 #define IMX_FEC_BASE ENET_BASE_ADDR 157 #define CONFIG_FEC_MXC_PHYADDR 0x1 158 159 #define CONFIG_FEC_XCV_TYPE RGMII 160 #define CONFIG_ETHPRIME "FEC" 161 162 #define CONFIG_PHY_ATHEROS 163 164 #ifdef CONFIG_CMD_USB 165 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 166 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 167 #define CONFIG_MXC_USB_FLAGS 0 168 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 169 #endif 170 171 #ifdef CONFIG_CMD_PCI 172 #define CONFIG_PCI_SCAN_SHOW 173 #define CONFIG_PCIE_IMX 174 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) 175 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) 176 #endif 177 178 #define CONFIG_IMX_THERMAL 179 180 #ifdef CONFIG_FSL_QSPI 181 #define CONFIG_SYS_FSL_QSPI_LE 182 #define CONFIG_SYS_FSL_QSPI_AHB 183 #ifdef CONFIG_MX6SX_SABRESD_REVA 184 #define FSL_QSPI_FLASH_SIZE SZ_16M 185 #else 186 #define FSL_QSPI_FLASH_SIZE SZ_32M 187 #endif 188 #define FSL_QSPI_FLASH_NUM 2 189 #endif 190 191 #ifndef CONFIG_SPL_BUILD 192 #ifdef CONFIG_VIDEO 193 #define CONFIG_VIDEO_MXS 194 #define CONFIG_VIDEO_LOGO 195 #define CONFIG_SPLASH_SCREEN 196 #define CONFIG_SPLASH_SCREEN_ALIGN 197 #define CONFIG_BMP_16BPP 198 #define CONFIG_VIDEO_BMP_RLE8 199 #define CONFIG_VIDEO_BMP_LOGO 200 #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR 201 #endif 202 #endif 203 204 #define CONFIG_ENV_OFFSET (14 * SZ_64K) 205 #define CONFIG_ENV_SIZE SZ_8K 206 207 #define CONFIG_SYS_FSL_USDHC_NUM 3 208 #if defined(CONFIG_ENV_IS_IN_MMC) 209 #define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC4*/ 210 #endif 211 212 #endif /* __CONFIG_H */ 213