1 /* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX6SL EVK board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "mx6_common.h" 13 14 #ifdef CONFIG_SPL 15 #include "imx6_spl.h" 16 #endif 17 18 #define MACH_TYPE_MX6SLEVK 4307 19 #define CONFIG_MACH_TYPE MACH_TYPE_MX6SLEVK 20 21 /* Size of malloc() pool */ 22 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) 23 24 #define CONFIG_BOARD_EARLY_INIT_F 25 26 #define CONFIG_MXC_UART 27 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR 28 29 /* MMC Configs */ 30 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 31 32 /* I2C Configs */ 33 #define CONFIG_SYS_I2C 34 #define CONFIG_SYS_I2C_MXC 35 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 36 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 37 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 38 #define CONFIG_SYS_I2C_SPEED 100000 39 40 /* PMIC */ 41 #define CONFIG_POWER 42 #define CONFIG_POWER_I2C 43 #define CONFIG_POWER_PFUZE100 44 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 45 46 #define CONFIG_FEC_MXC 47 #define CONFIG_MII 48 #define IMX_FEC_BASE ENET_BASE_ADDR 49 #define CONFIG_FEC_XCV_TYPE RMII 50 #define CONFIG_FEC_MXC_PHYADDR 0 51 52 #define CONFIG_PHYLIB 53 #define CONFIG_PHY_SMSC 54 55 #define CONFIG_EXTRA_ENV_SETTINGS \ 56 "script=boot.scr\0" \ 57 "image=zImage\0" \ 58 "console=ttymxc0\0" \ 59 "fdt_high=0xffffffff\0" \ 60 "initrd_high=0xffffffff\0" \ 61 "fdt_file=imx6sl-evk.dtb\0" \ 62 "fdt_addr=0x88000000\0" \ 63 "boot_fdt=try\0" \ 64 "ip_dyn=yes\0" \ 65 "mmcdev=1\0" \ 66 "mmcpart=1\0" \ 67 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 68 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 69 "root=${mmcroot}\0" \ 70 "loadbootscript=" \ 71 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 72 "bootscript=echo Running bootscript from mmc ...; " \ 73 "source\0" \ 74 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 75 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 76 "mmcboot=echo Booting from mmc ...; " \ 77 "run mmcargs; " \ 78 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 79 "if run loadfdt; then " \ 80 "bootz ${loadaddr} - ${fdt_addr}; " \ 81 "else " \ 82 "if test ${boot_fdt} = try; then " \ 83 "bootz; " \ 84 "else " \ 85 "echo WARN: Cannot load the DT; " \ 86 "fi; " \ 87 "fi; " \ 88 "else " \ 89 "bootz; " \ 90 "fi;\0" \ 91 "netargs=setenv bootargs console=${console},${baudrate} " \ 92 "root=/dev/nfs " \ 93 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 94 "netboot=echo Booting from net ...; " \ 95 "run netargs; " \ 96 "if test ${ip_dyn} = yes; then " \ 97 "setenv get_cmd dhcp; " \ 98 "else " \ 99 "setenv get_cmd tftp; " \ 100 "fi; " \ 101 "${get_cmd} ${image}; " \ 102 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 103 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 104 "bootz ${loadaddr} - ${fdt_addr}; " \ 105 "else " \ 106 "if test ${boot_fdt} = try; then " \ 107 "bootz; " \ 108 "else " \ 109 "echo WARN: Cannot load the DT; " \ 110 "fi; " \ 111 "fi; " \ 112 "else " \ 113 "bootz; " \ 114 "fi;\0" 115 116 #define CONFIG_BOOTCOMMAND \ 117 "mmc dev ${mmcdev};" \ 118 "mmc dev ${mmcdev}; if mmc rescan; then " \ 119 "if run loadbootscript; then " \ 120 "run bootscript; " \ 121 "else " \ 122 "if run loadimage; then " \ 123 "run mmcboot; " \ 124 "else run netboot; " \ 125 "fi; " \ 126 "fi; " \ 127 "else run netboot; fi" 128 129 /* Miscellaneous configurable options */ 130 #define CONFIG_SYS_MEMTEST_START 0x80000000 131 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M) 132 133 #define CONFIG_STACKSIZE SZ_128K 134 135 /* Physical Memory Map */ 136 #define CONFIG_NR_DRAM_BANKS 1 137 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 138 139 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 140 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 141 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 142 143 #define CONFIG_SYS_INIT_SP_OFFSET \ 144 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 145 #define CONFIG_SYS_INIT_SP_ADDR \ 146 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 147 148 /* Environment organization */ 149 #define CONFIG_ENV_SIZE SZ_8K 150 151 #if defined CONFIG_SYS_BOOT_SPINOR 152 #define CONFIG_ENV_IS_IN_SPI_FLASH 153 #define CONFIG_ENV_OFFSET (768 * 1024) 154 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 155 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 156 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 157 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 158 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 159 #else 160 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 161 #define CONFIG_ENV_IS_IN_MMC 162 #endif 163 164 #ifdef CONFIG_CMD_SF 165 #define CONFIG_MXC_SPI 166 #define CONFIG_SF_DEFAULT_BUS 0 167 #define CONFIG_SF_DEFAULT_CS 0 168 #define CONFIG_SF_DEFAULT_SPEED 20000000 169 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 170 #endif 171 172 /* USB Configs */ 173 #ifdef CONFIG_CMD_USB 174 #define CONFIG_USB_EHCI 175 #define CONFIG_USB_EHCI_MX6 176 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 177 #define CONFIG_USB_HOST_ETHER 178 #define CONFIG_USB_ETHER_ASIX 179 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 180 #define CONFIG_MXC_USB_FLAGS 0 181 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 182 #endif 183 184 #define CONFIG_SYS_FSL_USDHC_NUM 3 185 #if defined(CONFIG_ENV_IS_IN_MMC) 186 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC2*/ 187 #endif 188 189 #define CONFIG_IMX_THERMAL 190 191 #endif /* __CONFIG_H */ 192