xref: /openbmc/u-boot/include/configs/mx6slevk.h (revision ae485b54)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2013 Freescale Semiconductor, Inc.
4  *
5  * Configuration settings for the Freescale i.MX6SL EVK board.
6  */
7 
8 #ifndef __CONFIG_H
9 #define __CONFIG_H
10 
11 #include "mx6_common.h"
12 
13 #ifdef CONFIG_SPL
14 #include "imx6_spl.h"
15 #endif
16 
17 #define CONFIG_MACH_TYPE		MACH_TYPE_MX6SL_EVK
18 
19 /* Size of malloc() pool */
20 #define CONFIG_SYS_MALLOC_LEN		(3 * SZ_1M)
21 
22 #define CONFIG_MXC_UART
23 #define CONFIG_MXC_UART_BASE		UART1_IPS_BASE_ADDR
24 
25 /* MMC Configs */
26 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
27 
28 /* I2C Configs */
29 #define CONFIG_SYS_I2C_MXC
30 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
31 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
32 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
33 #define CONFIG_SYS_I2C_SPEED		  100000
34 
35 #define CONFIG_FEC_MXC
36 #define CONFIG_MII
37 #define IMX_FEC_BASE			ENET_BASE_ADDR
38 #define CONFIG_FEC_XCV_TYPE		RMII
39 #define CONFIG_FEC_MXC_PHYADDR		0
40 
41 #define CONFIG_PHY_SMSC
42 
43 #define CONFIG_EXTRA_ENV_SETTINGS \
44 	"script=boot.scr\0" \
45 	"image=zImage\0" \
46 	"console=ttymxc0\0" \
47 	"fdt_high=0xffffffff\0" \
48 	"initrd_high=0xffffffff\0" \
49 	"fdt_file=imx6sl-evk.dtb\0" \
50 	"fdt_addr=0x88000000\0" \
51 	"boot_fdt=try\0" \
52 	"ip_dyn=yes\0" \
53 	"mmcdev=1\0" \
54 	"mmcpart=1\0" \
55 	"finduuid=part uuid mmc 1:2 uuid\0" \
56 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
57 		"root=PARTUUID=${uuid} rootwait rw\0" \
58 	"loadbootscript=" \
59 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
60 	"bootscript=echo Running bootscript from mmc ...; " \
61 		"source\0" \
62 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
63 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
64 	"mmcboot=echo Booting from mmc ...; " \
65 		"run finduuid; " \
66 		"run mmcargs; " \
67 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
68 			"if run loadfdt; then " \
69 				"bootz ${loadaddr} - ${fdt_addr}; " \
70 			"else " \
71 				"if test ${boot_fdt} = try; then " \
72 					"bootz; " \
73 				"else " \
74 					"echo WARN: Cannot load the DT; " \
75 				"fi; " \
76 			"fi; " \
77 		"else " \
78 			"bootz; " \
79 		"fi;\0" \
80 	"netargs=setenv bootargs console=${console},${baudrate} " \
81 		"root=/dev/nfs " \
82 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
83 		"netboot=echo Booting from net ...; " \
84 		"run netargs; " \
85 		"if test ${ip_dyn} = yes; then " \
86 			"setenv get_cmd dhcp; " \
87 		"else " \
88 			"setenv get_cmd tftp; " \
89 		"fi; " \
90 		"${get_cmd} ${image}; " \
91 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
92 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
93 				"bootz ${loadaddr} - ${fdt_addr}; " \
94 			"else " \
95 				"if test ${boot_fdt} = try; then " \
96 					"bootz; " \
97 				"else " \
98 					"echo WARN: Cannot load the DT; " \
99 				"fi; " \
100 			"fi; " \
101 		"else " \
102 			"bootz; " \
103 		"fi;\0"
104 
105 #define CONFIG_BOOTCOMMAND \
106 	   "mmc dev ${mmcdev};" \
107 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
108 		   "if run loadbootscript; then " \
109 			   "run bootscript; " \
110 		   "else " \
111 			   "if run loadimage; then " \
112 				   "run mmcboot; " \
113 			   "else run netboot; " \
114 			   "fi; " \
115 		   "fi; " \
116 	   "else run netboot; fi"
117 
118 /* Miscellaneous configurable options */
119 #define CONFIG_SYS_MEMTEST_START	0x80000000
120 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_512M)
121 
122 /* Physical Memory Map */
123 #define CONFIG_NR_DRAM_BANKS		1
124 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
125 
126 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
127 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
128 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
129 
130 #define CONFIG_SYS_INIT_SP_OFFSET \
131 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
132 #define CONFIG_SYS_INIT_SP_ADDR \
133 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
134 
135 /* Environment organization */
136 #define CONFIG_ENV_SIZE			SZ_8K
137 
138 #if defined CONFIG_SPI_BOOT
139 #define CONFIG_ENV_OFFSET               (768 * 1024)
140 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
141 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
142 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
143 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
144 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
145 #else
146 #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
147 #endif
148 
149 #ifdef CONFIG_CMD_SF
150 #define CONFIG_SF_DEFAULT_BUS		0
151 #define CONFIG_SF_DEFAULT_CS		0
152 #define CONFIG_SF_DEFAULT_SPEED		20000000
153 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
154 #endif
155 
156 /* USB Configs */
157 #ifdef CONFIG_CMD_USB
158 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
159 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
160 #define CONFIG_MXC_USB_FLAGS		0
161 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
162 #endif
163 
164 #define CONFIG_SYS_FSL_USDHC_NUM	3
165 #if defined(CONFIG_ENV_IS_IN_MMC)
166 #define CONFIG_SYS_MMC_ENV_DEV		1	/* SDHC2*/
167 #endif
168 
169 #define CONFIG_IMX_THERMAL
170 
171 #endif				/* __CONFIG_H */
172