xref: /openbmc/u-boot/include/configs/mx6slevk.h (revision ad5b5801)
1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Freescale i.MX6SL EVK board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #include "mx6_common.h"
13 
14 #ifdef CONFIG_SPL
15 #define CONFIG_SPL_LIBCOMMON_SUPPORT
16 #define CONFIG_SPL_MMC_SUPPORT
17 #include "imx6_spl.h"
18 #endif
19 
20 #define MACH_TYPE_MX6SLEVK		4307
21 #define CONFIG_MACH_TYPE		MACH_TYPE_MX6SLEVK
22 
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN		(3 * SZ_1M)
25 
26 #define CONFIG_BOARD_EARLY_INIT_F
27 
28 #define CONFIG_MXC_UART
29 #define CONFIG_MXC_UART_BASE		UART1_IPS_BASE_ADDR
30 
31 /* MMC Configs */
32 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
33 
34 /* I2C Configs */
35 #define CONFIG_SYS_I2C
36 #define CONFIG_SYS_I2C_MXC
37 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
38 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
39 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
40 #define CONFIG_SYS_I2C_SPEED		  100000
41 
42 /* PMIC */
43 #define CONFIG_POWER
44 #define CONFIG_POWER_I2C
45 #define CONFIG_POWER_PFUZE100
46 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
47 
48 #define CONFIG_FEC_MXC
49 #define CONFIG_MII
50 #define IMX_FEC_BASE			ENET_BASE_ADDR
51 #define CONFIG_FEC_XCV_TYPE		RMII
52 #define CONFIG_FEC_MXC_PHYADDR		0
53 
54 #define CONFIG_PHYLIB
55 #define CONFIG_PHY_SMSC
56 
57 #define CONFIG_EXTRA_ENV_SETTINGS \
58 	"script=boot.scr\0" \
59 	"image=zImage\0" \
60 	"console=ttymxc0\0" \
61 	"fdt_high=0xffffffff\0" \
62 	"initrd_high=0xffffffff\0" \
63 	"fdt_file=imx6sl-evk.dtb\0" \
64 	"fdt_addr=0x88000000\0" \
65 	"boot_fdt=try\0" \
66 	"ip_dyn=yes\0" \
67 	"mmcdev=1\0" \
68 	"mmcpart=1\0" \
69 	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
70 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
71 		"root=${mmcroot}\0" \
72 	"loadbootscript=" \
73 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
74 	"bootscript=echo Running bootscript from mmc ...; " \
75 		"source\0" \
76 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
77 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
78 	"mmcboot=echo Booting from mmc ...; " \
79 		"run mmcargs; " \
80 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
81 			"if run loadfdt; then " \
82 				"bootz ${loadaddr} - ${fdt_addr}; " \
83 			"else " \
84 				"if test ${boot_fdt} = try; then " \
85 					"bootz; " \
86 				"else " \
87 					"echo WARN: Cannot load the DT; " \
88 				"fi; " \
89 			"fi; " \
90 		"else " \
91 			"bootz; " \
92 		"fi;\0" \
93 	"netargs=setenv bootargs console=${console},${baudrate} " \
94 		"root=/dev/nfs " \
95 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
96 		"netboot=echo Booting from net ...; " \
97 		"run netargs; " \
98 		"if test ${ip_dyn} = yes; then " \
99 			"setenv get_cmd dhcp; " \
100 		"else " \
101 			"setenv get_cmd tftp; " \
102 		"fi; " \
103 		"${get_cmd} ${image}; " \
104 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
105 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
106 				"bootz ${loadaddr} - ${fdt_addr}; " \
107 			"else " \
108 				"if test ${boot_fdt} = try; then " \
109 					"bootz; " \
110 				"else " \
111 					"echo WARN: Cannot load the DT; " \
112 				"fi; " \
113 			"fi; " \
114 		"else " \
115 			"bootz; " \
116 		"fi;\0"
117 
118 #define CONFIG_BOOTCOMMAND \
119 	   "mmc dev ${mmcdev};" \
120 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
121 		   "if run loadbootscript; then " \
122 			   "run bootscript; " \
123 		   "else " \
124 			   "if run loadimage; then " \
125 				   "run mmcboot; " \
126 			   "else run netboot; " \
127 			   "fi; " \
128 		   "fi; " \
129 	   "else run netboot; fi"
130 
131 /* Miscellaneous configurable options */
132 #define CONFIG_SYS_MEMTEST_START	0x80000000
133 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_512M)
134 
135 #define CONFIG_STACKSIZE		SZ_128K
136 
137 /* Physical Memory Map */
138 #define CONFIG_NR_DRAM_BANKS		1
139 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
140 #define PHYS_SDRAM_SIZE			SZ_1G
141 
142 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
143 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
144 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
145 
146 #define CONFIG_SYS_INIT_SP_OFFSET \
147 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
148 #define CONFIG_SYS_INIT_SP_ADDR \
149 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
150 
151 /* Environment organization */
152 #define CONFIG_ENV_SIZE			SZ_8K
153 
154 #if defined CONFIG_SYS_BOOT_SPINOR
155 #define CONFIG_ENV_IS_IN_SPI_FLASH
156 #define CONFIG_ENV_OFFSET               (768 * 1024)
157 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
158 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
159 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
160 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
161 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
162 #else
163 #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
164 #define CONFIG_ENV_IS_IN_MMC
165 #endif
166 
167 #ifdef CONFIG_CMD_SF
168 #define CONFIG_MXC_SPI
169 #define CONFIG_SF_DEFAULT_BUS		0
170 #define CONFIG_SF_DEFAULT_CS		0
171 #define CONFIG_SF_DEFAULT_SPEED		20000000
172 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
173 #endif
174 
175 /* USB Configs */
176 #ifdef CONFIG_CMD_USB
177 #define CONFIG_USB_EHCI
178 #define CONFIG_USB_EHCI_MX6
179 #define CONFIG_USB_STORAGE
180 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
181 #define CONFIG_USB_HOST_ETHER
182 #define CONFIG_USB_ETHER_ASIX
183 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
184 #define CONFIG_MXC_USB_FLAGS		0
185 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
186 #endif
187 
188 #define CONFIG_SYS_FSL_USDHC_NUM	3
189 #if defined(CONFIG_ENV_IS_IN_MMC)
190 #define CONFIG_SYS_MMC_ENV_DEV		1	/* SDHC2*/
191 #endif
192 
193 #define CONFIG_IMX_THERMAL
194 
195 #endif				/* __CONFIG_H */
196