1 /* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX6SL EVK board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "mx6_common.h" 13 14 #ifdef CONFIG_SPL 15 #define CONFIG_SPL_LIBCOMMON_SUPPORT 16 #define CONFIG_SPL_MMC_SUPPORT 17 #include "imx6_spl.h" 18 #endif 19 20 #define MACH_TYPE_MX6SLEVK 4307 21 #define CONFIG_MACH_TYPE MACH_TYPE_MX6SLEVK 22 23 /* Size of malloc() pool */ 24 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) 25 26 #define CONFIG_BOARD_EARLY_INIT_F 27 28 #define CONFIG_MXC_UART 29 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR 30 31 /* MMC Configs */ 32 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 33 34 /* I2C Configs */ 35 #define CONFIG_CMD_I2C 36 #define CONFIG_SYS_I2C 37 #define CONFIG_SYS_I2C_MXC 38 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 39 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 40 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 41 #define CONFIG_SYS_I2C_SPEED 100000 42 43 /* PMIC */ 44 #define CONFIG_POWER 45 #define CONFIG_POWER_I2C 46 #define CONFIG_POWER_PFUZE100 47 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 48 49 #define CONFIG_CMD_PING 50 #define CONFIG_CMD_DHCP 51 #define CONFIG_CMD_MII 52 #define CONFIG_FEC_MXC 53 #define CONFIG_MII 54 #define IMX_FEC_BASE ENET_BASE_ADDR 55 #define CONFIG_FEC_XCV_TYPE RMII 56 #define CONFIG_FEC_MXC_PHYADDR 0 57 58 #define CONFIG_PHYLIB 59 #define CONFIG_PHY_SMSC 60 61 #define CONFIG_EXTRA_ENV_SETTINGS \ 62 "script=boot.scr\0" \ 63 "image=zImage\0" \ 64 "console=ttymxc0\0" \ 65 "fdt_high=0xffffffff\0" \ 66 "initrd_high=0xffffffff\0" \ 67 "fdt_file=imx6sl-evk.dtb\0" \ 68 "fdt_addr=0x88000000\0" \ 69 "boot_fdt=try\0" \ 70 "ip_dyn=yes\0" \ 71 "mmcdev=1\0" \ 72 "mmcpart=1\0" \ 73 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 74 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 75 "root=${mmcroot}\0" \ 76 "loadbootscript=" \ 77 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 78 "bootscript=echo Running bootscript from mmc ...; " \ 79 "source\0" \ 80 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 81 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 82 "mmcboot=echo Booting from mmc ...; " \ 83 "run mmcargs; " \ 84 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 85 "if run loadfdt; then " \ 86 "bootz ${loadaddr} - ${fdt_addr}; " \ 87 "else " \ 88 "if test ${boot_fdt} = try; then " \ 89 "bootz; " \ 90 "else " \ 91 "echo WARN: Cannot load the DT; " \ 92 "fi; " \ 93 "fi; " \ 94 "else " \ 95 "bootz; " \ 96 "fi;\0" \ 97 "netargs=setenv bootargs console=${console},${baudrate} " \ 98 "root=/dev/nfs " \ 99 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 100 "netboot=echo Booting from net ...; " \ 101 "run netargs; " \ 102 "if test ${ip_dyn} = yes; then " \ 103 "setenv get_cmd dhcp; " \ 104 "else " \ 105 "setenv get_cmd tftp; " \ 106 "fi; " \ 107 "${get_cmd} ${image}; " \ 108 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 109 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 110 "bootz ${loadaddr} - ${fdt_addr}; " \ 111 "else " \ 112 "if test ${boot_fdt} = try; then " \ 113 "bootz; " \ 114 "else " \ 115 "echo WARN: Cannot load the DT; " \ 116 "fi; " \ 117 "fi; " \ 118 "else " \ 119 "bootz; " \ 120 "fi;\0" 121 122 #define CONFIG_BOOTCOMMAND \ 123 "mmc dev ${mmcdev};" \ 124 "mmc dev ${mmcdev}; if mmc rescan; then " \ 125 "if run loadbootscript; then " \ 126 "run bootscript; " \ 127 "else " \ 128 "if run loadimage; then " \ 129 "run mmcboot; " \ 130 "else run netboot; " \ 131 "fi; " \ 132 "fi; " \ 133 "else run netboot; fi" 134 135 /* Miscellaneous configurable options */ 136 #define CONFIG_SYS_MEMTEST_START 0x80000000 137 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M) 138 139 #define CONFIG_STACKSIZE SZ_128K 140 141 /* Physical Memory Map */ 142 #define CONFIG_NR_DRAM_BANKS 1 143 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 144 #define PHYS_SDRAM_SIZE SZ_1G 145 146 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 147 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 148 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 149 150 #define CONFIG_SYS_INIT_SP_OFFSET \ 151 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 152 #define CONFIG_SYS_INIT_SP_ADDR \ 153 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 154 155 /* Environment organization */ 156 #define CONFIG_ENV_SIZE SZ_8K 157 158 #if defined CONFIG_SYS_BOOT_SPINOR 159 #define CONFIG_ENV_IS_IN_SPI_FLASH 160 #define CONFIG_ENV_OFFSET (768 * 1024) 161 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 162 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 163 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 164 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 165 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 166 #else 167 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 168 #define CONFIG_ENV_IS_IN_MMC 169 #endif 170 171 #define CONFIG_CMD_SF 172 #ifdef CONFIG_CMD_SF 173 #define CONFIG_MXC_SPI 174 #define CONFIG_SF_DEFAULT_BUS 0 175 #define CONFIG_SF_DEFAULT_CS 0 176 #define CONFIG_SF_DEFAULT_SPEED 20000000 177 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 178 #endif 179 180 /* USB Configs */ 181 #define CONFIG_CMD_USB 182 #ifdef CONFIG_CMD_USB 183 #define CONFIG_USB_EHCI 184 #define CONFIG_USB_EHCI_MX6 185 #define CONFIG_USB_STORAGE 186 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 187 #define CONFIG_USB_HOST_ETHER 188 #define CONFIG_USB_ETHER_ASIX 189 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 190 #define CONFIG_MXC_USB_FLAGS 0 191 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 192 #endif 193 194 #define CONFIG_SYS_FSL_USDHC_NUM 3 195 #if defined(CONFIG_ENV_IS_IN_MMC) 196 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC2*/ 197 #endif 198 199 #define CONFIG_IMX_THERMAL 200 201 #endif /* __CONFIG_H */ 202