xref: /openbmc/u-boot/include/configs/mx6slevk.h (revision 11bd5e7b62070c7ca0188230edc4c5e7fdfe1349)
1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Freescale i.MX6SL EVK board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #include "mx6_common.h"
13 
14 #ifdef CONFIG_SPL
15 #include "imx6_spl.h"
16 #endif
17 
18 #define MACH_TYPE_MX6SLEVK		4307
19 #define CONFIG_MACH_TYPE		MACH_TYPE_MX6SLEVK
20 
21 /* Size of malloc() pool */
22 #define CONFIG_SYS_MALLOC_LEN		(3 * SZ_1M)
23 
24 #define CONFIG_MXC_UART
25 #define CONFIG_MXC_UART_BASE		UART1_IPS_BASE_ADDR
26 
27 /* MMC Configs */
28 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
29 
30 /* I2C Configs */
31 #define CONFIG_SYS_I2C
32 #define CONFIG_SYS_I2C_MXC
33 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
34 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
35 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
36 #define CONFIG_SYS_I2C_SPEED		  100000
37 
38 /* PMIC */
39 #define CONFIG_POWER
40 #define CONFIG_POWER_I2C
41 #define CONFIG_POWER_PFUZE100
42 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
43 
44 #define CONFIG_FEC_MXC
45 #define CONFIG_MII
46 #define IMX_FEC_BASE			ENET_BASE_ADDR
47 #define CONFIG_FEC_XCV_TYPE		RMII
48 #define CONFIG_FEC_MXC_PHYADDR		0
49 
50 #define CONFIG_PHYLIB
51 #define CONFIG_PHY_SMSC
52 
53 #define CONFIG_EXTRA_ENV_SETTINGS \
54 	"script=boot.scr\0" \
55 	"image=zImage\0" \
56 	"console=ttymxc0\0" \
57 	"fdt_high=0xffffffff\0" \
58 	"initrd_high=0xffffffff\0" \
59 	"fdt_file=imx6sl-evk.dtb\0" \
60 	"fdt_addr=0x88000000\0" \
61 	"boot_fdt=try\0" \
62 	"ip_dyn=yes\0" \
63 	"mmcdev=1\0" \
64 	"mmcpart=1\0" \
65 	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
66 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
67 		"root=${mmcroot}\0" \
68 	"loadbootscript=" \
69 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
70 	"bootscript=echo Running bootscript from mmc ...; " \
71 		"source\0" \
72 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
73 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
74 	"mmcboot=echo Booting from mmc ...; " \
75 		"run mmcargs; " \
76 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
77 			"if run loadfdt; then " \
78 				"bootz ${loadaddr} - ${fdt_addr}; " \
79 			"else " \
80 				"if test ${boot_fdt} = try; then " \
81 					"bootz; " \
82 				"else " \
83 					"echo WARN: Cannot load the DT; " \
84 				"fi; " \
85 			"fi; " \
86 		"else " \
87 			"bootz; " \
88 		"fi;\0" \
89 	"netargs=setenv bootargs console=${console},${baudrate} " \
90 		"root=/dev/nfs " \
91 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
92 		"netboot=echo Booting from net ...; " \
93 		"run netargs; " \
94 		"if test ${ip_dyn} = yes; then " \
95 			"setenv get_cmd dhcp; " \
96 		"else " \
97 			"setenv get_cmd tftp; " \
98 		"fi; " \
99 		"${get_cmd} ${image}; " \
100 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
101 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
102 				"bootz ${loadaddr} - ${fdt_addr}; " \
103 			"else " \
104 				"if test ${boot_fdt} = try; then " \
105 					"bootz; " \
106 				"else " \
107 					"echo WARN: Cannot load the DT; " \
108 				"fi; " \
109 			"fi; " \
110 		"else " \
111 			"bootz; " \
112 		"fi;\0"
113 
114 #define CONFIG_BOOTCOMMAND \
115 	   "mmc dev ${mmcdev};" \
116 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
117 		   "if run loadbootscript; then " \
118 			   "run bootscript; " \
119 		   "else " \
120 			   "if run loadimage; then " \
121 				   "run mmcboot; " \
122 			   "else run netboot; " \
123 			   "fi; " \
124 		   "fi; " \
125 	   "else run netboot; fi"
126 
127 /* Miscellaneous configurable options */
128 #define CONFIG_SYS_MEMTEST_START	0x80000000
129 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_512M)
130 
131 #define CONFIG_STACKSIZE		SZ_128K
132 
133 /* Physical Memory Map */
134 #define CONFIG_NR_DRAM_BANKS		1
135 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
136 
137 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
138 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
139 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
140 
141 #define CONFIG_SYS_INIT_SP_OFFSET \
142 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
143 #define CONFIG_SYS_INIT_SP_ADDR \
144 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
145 
146 /* Environment organization */
147 #define CONFIG_ENV_SIZE			SZ_8K
148 
149 #if defined CONFIG_SYS_BOOT_SPINOR
150 #define CONFIG_ENV_IS_IN_SPI_FLASH
151 #define CONFIG_ENV_OFFSET               (768 * 1024)
152 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
153 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
154 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
155 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
156 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
157 #else
158 #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
159 #define CONFIG_ENV_IS_IN_MMC
160 #endif
161 
162 #ifdef CONFIG_CMD_SF
163 #define CONFIG_MXC_SPI
164 #define CONFIG_SF_DEFAULT_BUS		0
165 #define CONFIG_SF_DEFAULT_CS		0
166 #define CONFIG_SF_DEFAULT_SPEED		20000000
167 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
168 #endif
169 
170 /* USB Configs */
171 #ifdef CONFIG_CMD_USB
172 #define CONFIG_USB_EHCI
173 #define CONFIG_USB_EHCI_MX6
174 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
175 #define CONFIG_USB_HOST_ETHER
176 #define CONFIG_USB_ETHER_ASIX
177 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
178 #define CONFIG_MXC_USB_FLAGS		0
179 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
180 #endif
181 
182 #define CONFIG_SYS_FSL_USDHC_NUM	3
183 #if defined(CONFIG_ENV_IS_IN_MMC)
184 #define CONFIG_SYS_MMC_ENV_DEV		1	/* SDHC2*/
185 #endif
186 
187 #define CONFIG_IMX_THERMAL
188 
189 #endif				/* __CONFIG_H */
190