xref: /openbmc/u-boot/include/configs/mx6slevk.h (revision 089df18b)
1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Freescale i.MX6SL EVK board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #include "mx6_common.h"
13 
14 #ifdef CONFIG_SPL
15 #include "imx6_spl.h"
16 #endif
17 
18 #define CONFIG_MACH_TYPE		MACH_TYPE_MX6SL_EVK
19 
20 /* Size of malloc() pool */
21 #define CONFIG_SYS_MALLOC_LEN		(3 * SZ_1M)
22 
23 #define CONFIG_MXC_UART
24 #define CONFIG_MXC_UART_BASE		UART1_IPS_BASE_ADDR
25 
26 /* MMC Configs */
27 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
28 
29 /* I2C Configs */
30 #define CONFIG_SYS_I2C_MXC
31 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
32 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
33 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
34 #define CONFIG_SYS_I2C_SPEED		  100000
35 
36 #define CONFIG_FEC_MXC
37 #define CONFIG_MII
38 #define IMX_FEC_BASE			ENET_BASE_ADDR
39 #define CONFIG_FEC_XCV_TYPE		RMII
40 #define CONFIG_FEC_MXC_PHYADDR		0
41 
42 #define CONFIG_PHYLIB
43 #define CONFIG_PHY_SMSC
44 
45 #define CONFIG_EXTRA_ENV_SETTINGS \
46 	"script=boot.scr\0" \
47 	"image=zImage\0" \
48 	"console=ttymxc0\0" \
49 	"fdt_high=0xffffffff\0" \
50 	"initrd_high=0xffffffff\0" \
51 	"fdt_file=imx6sl-evk.dtb\0" \
52 	"fdt_addr=0x88000000\0" \
53 	"boot_fdt=try\0" \
54 	"ip_dyn=yes\0" \
55 	"mmcdev=1\0" \
56 	"mmcpart=1\0" \
57 	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
58 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
59 		"root=${mmcroot}\0" \
60 	"loadbootscript=" \
61 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
62 	"bootscript=echo Running bootscript from mmc ...; " \
63 		"source\0" \
64 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
65 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
66 	"mmcboot=echo Booting from mmc ...; " \
67 		"run mmcargs; " \
68 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
69 			"if run loadfdt; then " \
70 				"bootz ${loadaddr} - ${fdt_addr}; " \
71 			"else " \
72 				"if test ${boot_fdt} = try; then " \
73 					"bootz; " \
74 				"else " \
75 					"echo WARN: Cannot load the DT; " \
76 				"fi; " \
77 			"fi; " \
78 		"else " \
79 			"bootz; " \
80 		"fi;\0" \
81 	"netargs=setenv bootargs console=${console},${baudrate} " \
82 		"root=/dev/nfs " \
83 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
84 		"netboot=echo Booting from net ...; " \
85 		"run netargs; " \
86 		"if test ${ip_dyn} = yes; then " \
87 			"setenv get_cmd dhcp; " \
88 		"else " \
89 			"setenv get_cmd tftp; " \
90 		"fi; " \
91 		"${get_cmd} ${image}; " \
92 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
93 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
94 				"bootz ${loadaddr} - ${fdt_addr}; " \
95 			"else " \
96 				"if test ${boot_fdt} = try; then " \
97 					"bootz; " \
98 				"else " \
99 					"echo WARN: Cannot load the DT; " \
100 				"fi; " \
101 			"fi; " \
102 		"else " \
103 			"bootz; " \
104 		"fi;\0"
105 
106 #define CONFIG_BOOTCOMMAND \
107 	   "mmc dev ${mmcdev};" \
108 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
109 		   "if run loadbootscript; then " \
110 			   "run bootscript; " \
111 		   "else " \
112 			   "if run loadimage; then " \
113 				   "run mmcboot; " \
114 			   "else run netboot; " \
115 			   "fi; " \
116 		   "fi; " \
117 	   "else run netboot; fi"
118 
119 /* Miscellaneous configurable options */
120 #define CONFIG_SYS_MEMTEST_START	0x80000000
121 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_512M)
122 
123 /* Physical Memory Map */
124 #define CONFIG_NR_DRAM_BANKS		1
125 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
126 
127 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
128 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
129 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
130 
131 #define CONFIG_SYS_INIT_SP_OFFSET \
132 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
133 #define CONFIG_SYS_INIT_SP_ADDR \
134 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
135 
136 /* Environment organization */
137 #define CONFIG_ENV_SIZE			SZ_8K
138 
139 #if defined CONFIG_SPI_BOOT
140 #define CONFIG_ENV_IS_IN_SPI_FLASH
141 #define CONFIG_ENV_OFFSET               (768 * 1024)
142 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
143 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
144 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
145 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
146 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
147 #else
148 #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
149 #define CONFIG_ENV_IS_IN_MMC
150 #endif
151 
152 #ifdef CONFIG_CMD_SF
153 #define CONFIG_MXC_SPI
154 #define CONFIG_SF_DEFAULT_BUS		0
155 #define CONFIG_SF_DEFAULT_CS		0
156 #define CONFIG_SF_DEFAULT_SPEED		20000000
157 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
158 #endif
159 
160 /* USB Configs */
161 #ifdef CONFIG_CMD_USB
162 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
163 #define CONFIG_USB_HOST_ETHER
164 #define CONFIG_USB_ETHER_ASIX
165 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
166 #define CONFIG_MXC_USB_FLAGS		0
167 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
168 #endif
169 
170 #define CONFIG_SYS_FSL_USDHC_NUM	3
171 #if defined(CONFIG_ENV_IS_IN_MMC)
172 #define CONFIG_SYS_MMC_ENV_DEV		1	/* SDHC2*/
173 #endif
174 
175 #define CONFIG_IMX_THERMAL
176 
177 #endif				/* __CONFIG_H */
178