xref: /openbmc/u-boot/include/configs/mx6sabresd.h (revision 679590eb)
1 /*
2  * Copyright (C) 2012 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Freescale i.MX6Q SabreSD board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __MX6SABRESD_CONFIG_H
10 #define __MX6SABRESD_CONFIG_H
11 
12 #ifdef CONFIG_SPL
13 #include "imx6_spl.h"
14 #endif
15 
16 #define CONFIG_MACH_TYPE	3980
17 #define CONFIG_MXC_UART_BASE	UART1_BASE
18 #define CONSOLE_DEV		"ttymxc0"
19 
20 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
21 
22 #include "mx6sabre_common.h"
23 
24 /* Falcon Mode */
25 #define CONFIG_SPL_FS_LOAD_ARGS_NAME	"args"
26 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME	"uImage"
27 #define CONFIG_CMD_SPL
28 #define CONFIG_SYS_SPL_ARGS_ADDR       0x18000000
29 #define CONFIG_CMD_SPL_WRITE_SIZE      (128 * SZ_1K)
30 
31 /* Falcon Mode - MMC support: args@1MB kernel@2MB */
32 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR  0x800   /* 1MB */
33 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
34 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR        0x1000  /* 2MB */
35 
36 #define CONFIG_SYS_FSL_USDHC_NUM	3
37 #if defined(CONFIG_ENV_IS_IN_MMC)
38 #define CONFIG_SYS_MMC_ENV_DEV		1	/* SDHC3 */
39 #endif
40 
41 #define CONFIG_CMD_PCI
42 #ifdef CONFIG_CMD_PCI
43 #define CONFIG_PCI_SCAN_SHOW
44 #define CONFIG_PCIE_IMX
45 #define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(7, 12)
46 #define CONFIG_PCIE_IMX_POWER_GPIO	IMX_GPIO_NR(3, 19)
47 #endif
48 
49 /* I2C Configs */
50 #define CONFIG_SYS_I2C
51 #define CONFIG_SYS_I2C_MXC
52 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
53 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
54 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
55 #define CONFIG_SYS_I2C_SPEED		  100000
56 
57 /* PMIC */
58 #define CONFIG_POWER
59 #define CONFIG_POWER_I2C
60 #define CONFIG_POWER_PFUZE100
61 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
62 
63 /* USB Configs */
64 #ifdef CONFIG_CMD_USB
65 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
66 #define CONFIG_USB_HOST_ETHER
67 #define CONFIG_USB_ETHER_ASIX
68 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
69 #define CONFIG_MXC_USB_FLAGS		0
70 #define CONFIG_USB_MAX_CONTROLLER_COUNT	1 /* Enabled USB controller number */
71 #endif
72 
73 #endif                         /* __MX6SABRESD_CONFIG_H */
74