1 /* 2 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #ifndef __MX6_COMMON_H 8 #define __MX6_COMMON_H 9 10 #ifndef CONFIG_MX6UL 11 #ifndef CONFIG_SYS_L2CACHE_OFF 12 #define CONFIG_SYS_L2_PL310 13 #define CONFIG_SYS_PL310_BASE L2_PL310_BASE 14 #endif 15 16 #define CONFIG_MP 17 #endif 18 #define CONFIG_BOARD_POSTCLK_INIT 19 #define CONFIG_MXC_GPT_HCLK 20 21 #define CONFIG_SYS_BOOTM_LEN 0x1000000 22 23 #include <linux/sizes.h> 24 #include <asm/arch/imx-regs.h> 25 #include <asm/mach-imx/gpio.h> 26 27 #ifndef CONFIG_MX6 28 #define CONFIG_MX6 29 #endif 30 31 #define CONFIG_SYS_FSL_CLK 32 33 /* ATAGs */ 34 #define CONFIG_CMDLINE_TAG 35 #define CONFIG_SETUP_MEMORY_TAGS 36 #define CONFIG_INITRD_TAG 37 #define CONFIG_REVISION_TAG 38 39 /* Boot options */ 40 #if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \ 41 defined(CONFIG_MX6UL) || defined(CONFIG_MX6SLL)) 42 #define CONFIG_LOADADDR 0x82000000 43 #ifndef CONFIG_SYS_TEXT_BASE 44 #define CONFIG_SYS_TEXT_BASE 0x87800000 45 #endif 46 #else 47 #define CONFIG_LOADADDR 0x12000000 48 #ifndef CONFIG_SYS_TEXT_BASE 49 #define CONFIG_SYS_TEXT_BASE 0x17800000 50 #endif 51 #endif 52 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 53 54 /* allow to overwrite serial and ethaddr */ 55 #define CONFIG_ENV_OVERWRITE 56 #define CONFIG_CONS_INDEX 1 57 58 /* Filesystems and image support */ 59 #define CONFIG_SUPPORT_RAW_INITRD 60 61 /* Miscellaneous configurable options */ 62 #define CONFIG_SYS_LONGHELP 63 #define CONFIG_CMDLINE_EDITING 64 #define CONFIG_AUTO_COMPLETE 65 #define CONFIG_SYS_CBSIZE 512 66 #define CONFIG_SYS_MAXARGS 32 67 68 /* GPIO */ 69 #define CONFIG_MXC_GPIO 70 71 /* MMC */ 72 #define CONFIG_BOUNCE_BUFFER 73 #define CONFIG_FSL_ESDHC 74 #define CONFIG_FSL_USDHC 75 76 /* Fuses */ 77 #define CONFIG_MXC_OCOTP 78 79 /* Secure boot (HAB) support */ 80 #ifdef CONFIG_SECURE_BOOT 81 #define CONFIG_CSF_SIZE 0x2000 82 #ifdef CONFIG_SPL_BUILD 83 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT 84 #endif 85 #endif 86 87 #endif 88