1 /* 2 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #ifndef __MX6_COMMON_H 8 #define __MX6_COMMON_H 9 10 #ifndef CONFIG_MX6UL 11 #define CONFIG_ARM_ERRATA_743622 12 #define CONFIG_ARM_ERRATA_751472 13 #define CONFIG_ARM_ERRATA_794072 14 #define CONFIG_ARM_ERRATA_761320 15 16 #ifndef CONFIG_SYS_L2CACHE_OFF 17 #define CONFIG_SYS_L2_PL310 18 #define CONFIG_SYS_PL310_BASE L2_PL310_BASE 19 #endif 20 21 #define CONFIG_MP 22 #endif 23 #define CONFIG_BOARD_POSTCLK_INIT 24 #define CONFIG_MXC_GPT_HCLK 25 26 #define CONFIG_SYS_NO_FLASH 27 28 #define CONFIG_SYS_BOOTM_LEN 0x1000000 29 30 #include <linux/sizes.h> 31 #include <asm/arch/imx-regs.h> 32 #include <asm/imx-common/gpio.h> 33 34 #ifndef CONFIG_MX6 35 #define CONFIG_MX6 36 #endif 37 38 #define CONFIG_SYS_FSL_CLK 39 40 /* ATAGs */ 41 #define CONFIG_CMDLINE_TAG 42 #define CONFIG_SETUP_MEMORY_TAGS 43 #define CONFIG_INITRD_TAG 44 #define CONFIG_REVISION_TAG 45 46 /* Boot options */ 47 #if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \ 48 defined(CONFIG_MX6UL) || defined(CONFIG_MX6SLL)) 49 #define CONFIG_LOADADDR 0x82000000 50 #ifndef CONFIG_SYS_TEXT_BASE 51 #define CONFIG_SYS_TEXT_BASE 0x87800000 52 #endif 53 #else 54 #define CONFIG_LOADADDR 0x12000000 55 #ifndef CONFIG_SYS_TEXT_BASE 56 #define CONFIG_SYS_TEXT_BASE 0x17800000 57 #endif 58 #endif 59 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 60 61 /* allow to overwrite serial and ethaddr */ 62 #define CONFIG_ENV_OVERWRITE 63 #define CONFIG_CONS_INDEX 1 64 #define CONFIG_BAUDRATE 115200 65 66 /* Filesystems and image support */ 67 #define CONFIG_SUPPORT_RAW_INITRD 68 69 /* Miscellaneous configurable options */ 70 #define CONFIG_SYS_LONGHELP 71 #define CONFIG_CMDLINE_EDITING 72 #define CONFIG_AUTO_COMPLETE 73 #define CONFIG_SYS_CBSIZE 512 74 #define CONFIG_SYS_MAXARGS 32 75 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 76 77 #ifndef CONFIG_SYS_DCACHE_OFF 78 #endif 79 80 /* GPIO */ 81 #define CONFIG_MXC_GPIO 82 83 /* MMC */ 84 #define CONFIG_BOUNCE_BUFFER 85 #define CONFIG_FSL_ESDHC 86 #define CONFIG_FSL_USDHC 87 88 /* Fuses */ 89 #define CONFIG_CMD_FUSE 90 #define CONFIG_MXC_OCOTP 91 92 /* Secure boot (HAB) support */ 93 #ifdef CONFIG_SECURE_BOOT 94 #define CONFIG_CSF_SIZE 0x2000 95 #define CONFIG_FSL_CAAM 96 #define CONFIG_CMD_DEKBLOB 97 #ifdef CONFIG_SPL_BUILD 98 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT 99 #endif 100 #endif 101 102 #endif 103