xref: /openbmc/u-boot/include/configs/mx53smd.h (revision d9b88d25)
1 /*
2  * Copyright (C) 2011 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the MX53SMD Freescale board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #define CONFIG_MX53
13 
14 #define CONFIG_MACH_TYPE	MACH_TYPE_MX53_SMD
15 
16 #include <asm/arch/imx-regs.h>
17 
18 #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
19 #define CONFIG_SETUP_MEMORY_TAGS
20 #define CONFIG_INITRD_TAG
21 #define CONFIG_REVISION_TAG
22 
23 #define CONFIG_SYS_FSL_CLK
24 
25 /* Size of malloc() pool */
26 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
27 
28 #define CONFIG_MXC_GPIO
29 
30 #define CONFIG_MXC_UART
31 #define CONFIG_MXC_UART_BASE	UART1_BASE
32 
33 /* I2C Configs */
34 #define CONFIG_SYS_I2C
35 #define CONFIG_SYS_I2C_MXC
36 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
37 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
38 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
39 
40 /* MMC Configs */
41 #define CONFIG_FSL_ESDHC
42 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
43 #define CONFIG_SYS_FSL_ESDHC_NUM	1
44 
45 #define CONFIG_GENERIC_MMC
46 
47 /* Eth Configs */
48 #define CONFIG_HAS_ETH1
49 #define CONFIG_MII
50 
51 #define CONFIG_FEC_MXC
52 #define IMX_FEC_BASE	FEC_BASE_ADDR
53 #define CONFIG_FEC_MXC_PHYADDR	0x1F
54 
55 /* allow to overwrite serial and ethaddr */
56 #define CONFIG_ENV_OVERWRITE
57 #define CONFIG_CONS_INDEX		1
58 #define CONFIG_BAUDRATE			115200
59 
60 /* Command definition */
61 
62 #define CONFIG_ETHPRIME		"FEC0"
63 
64 #define CONFIG_LOADADDR		0x70800000	/* loadaddr env var */
65 #define CONFIG_SYS_TEXT_BASE    0x77800000
66 
67 #define CONFIG_EXTRA_ENV_SETTINGS \
68 	"script=boot.scr\0" \
69 	"uimage=uImage\0" \
70 	"mmcdev=0\0" \
71 	"mmcpart=2\0" \
72 	"mmcroot=/dev/mmcblk0p3 rw\0" \
73 	"mmcrootfstype=ext3 rootwait\0" \
74 	"mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
75 		"root=${mmcroot} " \
76 		"rootfstype=${mmcrootfstype}\0" \
77 	"loadbootscript=" \
78 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
79 	"bootscript=echo Running bootscript from mmc ...; " \
80 		"source\0" \
81 	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
82 	"mmcboot=echo Booting from mmc ...; " \
83 		"run mmcargs; " \
84 		"bootm\0" \
85 	"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
86 		"root=/dev/nfs " \
87 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
88 	"netboot=echo Booting from net ...; " \
89 		"run netargs; " \
90 		"dhcp ${uimage}; bootm\0" \
91 
92 #define CONFIG_BOOTCOMMAND \
93 	"mmc dev ${mmcdev}; if mmc rescan; then " \
94 		"if run loadbootscript; then " \
95 			"run bootscript; " \
96 		"else " \
97 			"if run loaduimage; then " \
98 				"run mmcboot; " \
99 			"else run netboot; " \
100 			"fi; " \
101 		"fi; " \
102 	"else run netboot; fi"
103 #define CONFIG_ARP_TIMEOUT	200UL
104 
105 /* Miscellaneous configurable options */
106 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
107 #define CONFIG_AUTO_COMPLETE
108 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
109 
110 /* Print Buffer Size */
111 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
112 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
113 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
114 
115 #define CONFIG_SYS_MEMTEST_START       0x70000000
116 #define CONFIG_SYS_MEMTEST_END         0x70010000
117 
118 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
119 
120 #define CONFIG_CMDLINE_EDITING
121 
122 /* Physical Memory Map */
123 #define CONFIG_NR_DRAM_BANKS	2
124 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
125 #define PHYS_SDRAM_1_SIZE	(512 * 1024 * 1024)
126 #define PHYS_SDRAM_2		CSD1_BASE_ADDR
127 #define PHYS_SDRAM_2_SIZE	(512 * 1024 * 1024)
128 #define PHYS_SDRAM_SIZE         (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
129 
130 #define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
131 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
132 #define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)
133 
134 #define CONFIG_SYS_INIT_SP_OFFSET \
135 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
136 #define CONFIG_SYS_INIT_SP_ADDR \
137 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
138 
139 /* FLASH and environment organization */
140 #define CONFIG_SYS_NO_FLASH
141 
142 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
143 #define CONFIG_ENV_SIZE        (8 * 1024)
144 #define CONFIG_ENV_IS_IN_MMC
145 #define CONFIG_SYS_MMC_ENV_DEV 0
146 
147 #endif				/* __CONFIG_H */
148