xref: /openbmc/u-boot/include/configs/mx53smd.h (revision afaea1f5)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2011 Freescale Semiconductor, Inc.
4  *
5  * Configuration settings for the MX53SMD Freescale board.
6  */
7 
8 #ifndef __CONFIG_H
9 #define __CONFIG_H
10 
11 #define CONFIG_MACH_TYPE	MACH_TYPE_MX53_SMD
12 
13 #include <asm/arch/imx-regs.h>
14 
15 #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
16 #define CONFIG_SETUP_MEMORY_TAGS
17 #define CONFIG_INITRD_TAG
18 #define CONFIG_REVISION_TAG
19 
20 #define CONFIG_SYS_FSL_CLK
21 
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
24 
25 #define CONFIG_MXC_UART
26 #define CONFIG_MXC_UART_BASE	UART1_BASE
27 
28 /* I2C Configs */
29 #define CONFIG_SYS_I2C
30 #define CONFIG_SYS_I2C_MXC
31 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
32 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
33 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
34 
35 /* MMC Configs */
36 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
37 #define CONFIG_SYS_FSL_ESDHC_NUM	1
38 
39 /* Eth Configs */
40 #define CONFIG_HAS_ETH1
41 
42 #define CONFIG_FEC_MXC
43 #define IMX_FEC_BASE	FEC_BASE_ADDR
44 #define CONFIG_FEC_MXC_PHYADDR	0x1F
45 
46 /* allow to overwrite serial and ethaddr */
47 #define CONFIG_ENV_OVERWRITE
48 
49 /* Command definition */
50 
51 #define CONFIG_ETHPRIME		"FEC0"
52 
53 #define CONFIG_LOADADDR		0x70800000	/* loadaddr env var */
54 
55 #define CONFIG_EXTRA_ENV_SETTINGS \
56 	"script=boot.scr\0" \
57 	"uimage=uImage\0" \
58 	"mmcdev=0\0" \
59 	"mmcpart=2\0" \
60 	"mmcroot=/dev/mmcblk0p3 rw\0" \
61 	"mmcrootfstype=ext3 rootwait\0" \
62 	"mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
63 		"root=${mmcroot} " \
64 		"rootfstype=${mmcrootfstype}\0" \
65 	"loadbootscript=" \
66 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
67 	"bootscript=echo Running bootscript from mmc ...; " \
68 		"source\0" \
69 	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
70 	"mmcboot=echo Booting from mmc ...; " \
71 		"run mmcargs; " \
72 		"bootm\0" \
73 	"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
74 		"root=/dev/nfs " \
75 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
76 	"netboot=echo Booting from net ...; " \
77 		"run netargs; " \
78 		"dhcp ${uimage}; bootm\0" \
79 
80 #define CONFIG_BOOTCOMMAND \
81 	"mmc dev ${mmcdev}; if mmc rescan; then " \
82 		"if run loadbootscript; then " \
83 			"run bootscript; " \
84 		"else " \
85 			"if run loaduimage; then " \
86 				"run mmcboot; " \
87 			"else run netboot; " \
88 			"fi; " \
89 		"fi; " \
90 	"else run netboot; fi"
91 #define CONFIG_ARP_TIMEOUT	200UL
92 
93 /* Miscellaneous configurable options */
94 
95 #define CONFIG_SYS_MEMTEST_START       0x70000000
96 #define CONFIG_SYS_MEMTEST_END         0x70010000
97 
98 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
99 
100 /* Physical Memory Map */
101 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
102 #define PHYS_SDRAM_1_SIZE	(512 * 1024 * 1024)
103 #define PHYS_SDRAM_2		CSD1_BASE_ADDR
104 #define PHYS_SDRAM_2_SIZE	(512 * 1024 * 1024)
105 #define PHYS_SDRAM_SIZE         (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
106 
107 #define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
108 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
109 #define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)
110 
111 #define CONFIG_SYS_INIT_SP_OFFSET \
112 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
113 #define CONFIG_SYS_INIT_SP_ADDR \
114 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
115 
116 /* environment organization */
117 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
118 #define CONFIG_ENV_SIZE        (8 * 1024)
119 #define CONFIG_SYS_MMC_ENV_DEV 0
120 
121 #endif				/* __CONFIG_H */
122