1 /* 2 * Copyright (C) 2011 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the MX53SMD Freescale board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #define CONFIG_MX53 13 14 #define CONFIG_DISPLAY_CPUINFO 15 #define CONFIG_DISPLAY_BOARDINFO 16 17 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD 18 19 #include <asm/arch/imx-regs.h> 20 21 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 22 #define CONFIG_SETUP_MEMORY_TAGS 23 #define CONFIG_INITRD_TAG 24 #define CONFIG_REVISION_TAG 25 26 #define CONFIG_SYS_GENERIC_BOARD 27 28 /* Size of malloc() pool */ 29 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 30 31 #define CONFIG_BOARD_EARLY_INIT_F 32 #define CONFIG_MXC_GPIO 33 34 #define CONFIG_MXC_UART 35 #define CONFIG_MXC_UART_BASE UART1_BASE 36 37 /* I2C Configs */ 38 #define CONFIG_CMD_I2C 39 #define CONFIG_SYS_I2C 40 #define CONFIG_SYS_I2C_MXC 41 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 42 43 /* MMC Configs */ 44 #define CONFIG_FSL_ESDHC 45 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 46 #define CONFIG_SYS_FSL_ESDHC_NUM 1 47 48 #define CONFIG_MMC 49 #define CONFIG_CMD_MMC 50 #define CONFIG_GENERIC_MMC 51 #define CONFIG_CMD_FAT 52 #define CONFIG_DOS_PARTITION 53 54 /* Eth Configs */ 55 #define CONFIG_HAS_ETH1 56 #define CONFIG_MII 57 58 #define CONFIG_FEC_MXC 59 #define IMX_FEC_BASE FEC_BASE_ADDR 60 #define CONFIG_FEC_MXC_PHYADDR 0x1F 61 62 #define CONFIG_CMD_PING 63 #define CONFIG_CMD_DHCP 64 #define CONFIG_CMD_MII 65 66 /* allow to overwrite serial and ethaddr */ 67 #define CONFIG_ENV_OVERWRITE 68 #define CONFIG_CONS_INDEX 1 69 #define CONFIG_BAUDRATE 115200 70 71 /* Command definition */ 72 #define CONFIG_BOOTDELAY 3 73 74 #define CONFIG_ETHPRIME "FEC0" 75 76 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ 77 #define CONFIG_SYS_TEXT_BASE 0x77800000 78 79 #define CONFIG_EXTRA_ENV_SETTINGS \ 80 "script=boot.scr\0" \ 81 "uimage=uImage\0" \ 82 "mmcdev=0\0" \ 83 "mmcpart=2\0" \ 84 "mmcroot=/dev/mmcblk0p3 rw\0" \ 85 "mmcrootfstype=ext3 rootwait\0" \ 86 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 87 "root=${mmcroot} " \ 88 "rootfstype=${mmcrootfstype}\0" \ 89 "loadbootscript=" \ 90 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 91 "bootscript=echo Running bootscript from mmc ...; " \ 92 "source\0" \ 93 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 94 "mmcboot=echo Booting from mmc ...; " \ 95 "run mmcargs; " \ 96 "bootm\0" \ 97 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 98 "root=/dev/nfs " \ 99 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 100 "netboot=echo Booting from net ...; " \ 101 "run netargs; " \ 102 "dhcp ${uimage}; bootm\0" \ 103 104 #define CONFIG_BOOTCOMMAND \ 105 "mmc dev ${mmcdev}; if mmc rescan; then " \ 106 "if run loadbootscript; then " \ 107 "run bootscript; " \ 108 "else " \ 109 "if run loaduimage; then " \ 110 "run mmcboot; " \ 111 "else run netboot; " \ 112 "fi; " \ 113 "fi; " \ 114 "else run netboot; fi" 115 #define CONFIG_ARP_TIMEOUT 200UL 116 117 /* Miscellaneous configurable options */ 118 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 119 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 120 #define CONFIG_AUTO_COMPLETE 121 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 122 123 /* Print Buffer Size */ 124 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 125 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 126 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 127 128 #define CONFIG_SYS_MEMTEST_START 0x70000000 129 #define CONFIG_SYS_MEMTEST_END 0x70010000 130 131 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 132 133 #define CONFIG_CMDLINE_EDITING 134 135 /* Physical Memory Map */ 136 #define CONFIG_NR_DRAM_BANKS 2 137 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 138 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 139 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 140 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024) 141 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE) 142 143 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 144 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 145 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 146 147 #define CONFIG_SYS_INIT_SP_OFFSET \ 148 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 149 #define CONFIG_SYS_INIT_SP_ADDR \ 150 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 151 152 /* FLASH and environment organization */ 153 #define CONFIG_SYS_NO_FLASH 154 155 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 156 #define CONFIG_ENV_SIZE (8 * 1024) 157 #define CONFIG_ENV_IS_IN_MMC 158 #define CONFIG_SYS_MMC_ENV_DEV 0 159 160 #define CONFIG_OF_LIBFDT 161 162 #endif /* __CONFIG_H */ 163