xref: /openbmc/u-boot/include/configs/mx53smd.h (revision 704744f8)
1 /*
2  * Copyright (C) 2011 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the MX53SMD Freescale board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #define CONFIG_MACH_TYPE	MACH_TYPE_MX53_SMD
13 
14 #include <asm/arch/imx-regs.h>
15 
16 #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
17 #define CONFIG_SETUP_MEMORY_TAGS
18 #define CONFIG_INITRD_TAG
19 #define CONFIG_REVISION_TAG
20 
21 #define CONFIG_SYS_FSL_CLK
22 
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
25 
26 #define CONFIG_MXC_UART
27 #define CONFIG_MXC_UART_BASE	UART1_BASE
28 
29 /* I2C Configs */
30 #define CONFIG_SYS_I2C
31 #define CONFIG_SYS_I2C_MXC
32 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
33 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
34 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
35 
36 /* MMC Configs */
37 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
38 #define CONFIG_SYS_FSL_ESDHC_NUM	1
39 
40 /* Eth Configs */
41 #define CONFIG_HAS_ETH1
42 #define CONFIG_MII
43 
44 #define CONFIG_FEC_MXC
45 #define IMX_FEC_BASE	FEC_BASE_ADDR
46 #define CONFIG_FEC_MXC_PHYADDR	0x1F
47 
48 /* allow to overwrite serial and ethaddr */
49 #define CONFIG_ENV_OVERWRITE
50 
51 /* Command definition */
52 
53 #define CONFIG_ETHPRIME		"FEC0"
54 
55 #define CONFIG_LOADADDR		0x70800000	/* loadaddr env var */
56 
57 #define CONFIG_EXTRA_ENV_SETTINGS \
58 	"script=boot.scr\0" \
59 	"uimage=uImage\0" \
60 	"mmcdev=0\0" \
61 	"mmcpart=2\0" \
62 	"mmcroot=/dev/mmcblk0p3 rw\0" \
63 	"mmcrootfstype=ext3 rootwait\0" \
64 	"mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
65 		"root=${mmcroot} " \
66 		"rootfstype=${mmcrootfstype}\0" \
67 	"loadbootscript=" \
68 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
69 	"bootscript=echo Running bootscript from mmc ...; " \
70 		"source\0" \
71 	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
72 	"mmcboot=echo Booting from mmc ...; " \
73 		"run mmcargs; " \
74 		"bootm\0" \
75 	"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
76 		"root=/dev/nfs " \
77 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
78 	"netboot=echo Booting from net ...; " \
79 		"run netargs; " \
80 		"dhcp ${uimage}; bootm\0" \
81 
82 #define CONFIG_BOOTCOMMAND \
83 	"mmc dev ${mmcdev}; if mmc rescan; then " \
84 		"if run loadbootscript; then " \
85 			"run bootscript; " \
86 		"else " \
87 			"if run loaduimage; then " \
88 				"run mmcboot; " \
89 			"else run netboot; " \
90 			"fi; " \
91 		"fi; " \
92 	"else run netboot; fi"
93 #define CONFIG_ARP_TIMEOUT	200UL
94 
95 /* Miscellaneous configurable options */
96 
97 #define CONFIG_SYS_MEMTEST_START       0x70000000
98 #define CONFIG_SYS_MEMTEST_END         0x70010000
99 
100 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
101 
102 /* Physical Memory Map */
103 #define CONFIG_NR_DRAM_BANKS	2
104 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
105 #define PHYS_SDRAM_1_SIZE	(512 * 1024 * 1024)
106 #define PHYS_SDRAM_2		CSD1_BASE_ADDR
107 #define PHYS_SDRAM_2_SIZE	(512 * 1024 * 1024)
108 #define PHYS_SDRAM_SIZE         (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
109 
110 #define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
111 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
112 #define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)
113 
114 #define CONFIG_SYS_INIT_SP_OFFSET \
115 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
116 #define CONFIG_SYS_INIT_SP_ADDR \
117 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
118 
119 /* environment organization */
120 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
121 #define CONFIG_ENV_SIZE        (8 * 1024)
122 #define CONFIG_SYS_MMC_ENV_DEV 0
123 
124 #endif				/* __CONFIG_H */
125