xref: /openbmc/u-boot/include/configs/mx53smd.h (revision 2d2811c2)
1 /*
2  * Copyright (C) 2011 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the MX53SMD Freescale board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #define CONFIG_MX53
13 
14 #define CONFIG_DISPLAY_CPUINFO
15 #define CONFIG_DISPLAY_BOARDINFO
16 
17 #define CONFIG_MACH_TYPE	MACH_TYPE_MX53_SMD
18 
19 #include <asm/arch/imx-regs.h>
20 
21 #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
22 #define CONFIG_SETUP_MEMORY_TAGS
23 #define CONFIG_INITRD_TAG
24 #define CONFIG_REVISION_TAG
25 
26 #define CONFIG_SYS_FSL_CLK
27 
28 /* Size of malloc() pool */
29 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
30 
31 #define CONFIG_BOARD_EARLY_INIT_F
32 #define CONFIG_MXC_GPIO
33 
34 #define CONFIG_MXC_UART
35 #define CONFIG_MXC_UART_BASE	UART1_BASE
36 
37 /* I2C Configs */
38 #define CONFIG_SYS_I2C
39 #define CONFIG_SYS_I2C_MXC
40 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
41 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
42 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
43 
44 /* MMC Configs */
45 #define CONFIG_FSL_ESDHC
46 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
47 #define CONFIG_SYS_FSL_ESDHC_NUM	1
48 
49 #define CONFIG_MMC
50 #define CONFIG_GENERIC_MMC
51 #define CONFIG_DOS_PARTITION
52 
53 /* Eth Configs */
54 #define CONFIG_HAS_ETH1
55 #define CONFIG_MII
56 
57 #define CONFIG_FEC_MXC
58 #define IMX_FEC_BASE	FEC_BASE_ADDR
59 #define CONFIG_FEC_MXC_PHYADDR	0x1F
60 
61 /* allow to overwrite serial and ethaddr */
62 #define CONFIG_ENV_OVERWRITE
63 #define CONFIG_CONS_INDEX		1
64 #define CONFIG_BAUDRATE			115200
65 
66 /* Command definition */
67 
68 #define CONFIG_ETHPRIME		"FEC0"
69 
70 #define CONFIG_LOADADDR		0x70800000	/* loadaddr env var */
71 #define CONFIG_SYS_TEXT_BASE    0x77800000
72 
73 #define CONFIG_EXTRA_ENV_SETTINGS \
74 	"script=boot.scr\0" \
75 	"uimage=uImage\0" \
76 	"mmcdev=0\0" \
77 	"mmcpart=2\0" \
78 	"mmcroot=/dev/mmcblk0p3 rw\0" \
79 	"mmcrootfstype=ext3 rootwait\0" \
80 	"mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
81 		"root=${mmcroot} " \
82 		"rootfstype=${mmcrootfstype}\0" \
83 	"loadbootscript=" \
84 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
85 	"bootscript=echo Running bootscript from mmc ...; " \
86 		"source\0" \
87 	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
88 	"mmcboot=echo Booting from mmc ...; " \
89 		"run mmcargs; " \
90 		"bootm\0" \
91 	"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
92 		"root=/dev/nfs " \
93 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
94 	"netboot=echo Booting from net ...; " \
95 		"run netargs; " \
96 		"dhcp ${uimage}; bootm\0" \
97 
98 #define CONFIG_BOOTCOMMAND \
99 	"mmc dev ${mmcdev}; if mmc rescan; then " \
100 		"if run loadbootscript; then " \
101 			"run bootscript; " \
102 		"else " \
103 			"if run loaduimage; then " \
104 				"run mmcboot; " \
105 			"else run netboot; " \
106 			"fi; " \
107 		"fi; " \
108 	"else run netboot; fi"
109 #define CONFIG_ARP_TIMEOUT	200UL
110 
111 /* Miscellaneous configurable options */
112 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
113 #define CONFIG_AUTO_COMPLETE
114 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
115 
116 /* Print Buffer Size */
117 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
118 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
119 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
120 
121 #define CONFIG_SYS_MEMTEST_START       0x70000000
122 #define CONFIG_SYS_MEMTEST_END         0x70010000
123 
124 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
125 
126 #define CONFIG_CMDLINE_EDITING
127 
128 /* Physical Memory Map */
129 #define CONFIG_NR_DRAM_BANKS	2
130 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
131 #define PHYS_SDRAM_1_SIZE	(512 * 1024 * 1024)
132 #define PHYS_SDRAM_2		CSD1_BASE_ADDR
133 #define PHYS_SDRAM_2_SIZE	(512 * 1024 * 1024)
134 #define PHYS_SDRAM_SIZE         (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
135 
136 #define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
137 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
138 #define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)
139 
140 #define CONFIG_SYS_INIT_SP_OFFSET \
141 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
142 #define CONFIG_SYS_INIT_SP_ADDR \
143 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
144 
145 /* FLASH and environment organization */
146 #define CONFIG_SYS_NO_FLASH
147 
148 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
149 #define CONFIG_ENV_SIZE        (8 * 1024)
150 #define CONFIG_ENV_IS_IN_MMC
151 #define CONFIG_SYS_MMC_ENV_DEV 0
152 
153 #endif				/* __CONFIG_H */
154