1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2011 Freescale Semiconductor, Inc. 4 * 5 * Configuration settings for the MX53SMD Freescale board. 6 */ 7 8 #ifndef __CONFIG_H 9 #define __CONFIG_H 10 11 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD 12 13 #include <asm/arch/imx-regs.h> 14 15 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 16 #define CONFIG_SETUP_MEMORY_TAGS 17 #define CONFIG_INITRD_TAG 18 #define CONFIG_REVISION_TAG 19 20 #define CONFIG_SYS_FSL_CLK 21 22 /* Size of malloc() pool */ 23 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 24 25 #define CONFIG_MXC_UART 26 #define CONFIG_MXC_UART_BASE UART1_BASE 27 28 /* I2C Configs */ 29 #define CONFIG_SYS_I2C 30 #define CONFIG_SYS_I2C_MXC 31 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 32 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 33 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 34 35 /* MMC Configs */ 36 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 37 #define CONFIG_SYS_FSL_ESDHC_NUM 1 38 39 /* Eth Configs */ 40 #define CONFIG_HAS_ETH1 41 #define CONFIG_MII 42 43 #define CONFIG_FEC_MXC 44 #define IMX_FEC_BASE FEC_BASE_ADDR 45 #define CONFIG_FEC_MXC_PHYADDR 0x1F 46 47 /* allow to overwrite serial and ethaddr */ 48 #define CONFIG_ENV_OVERWRITE 49 50 /* Command definition */ 51 52 #define CONFIG_ETHPRIME "FEC0" 53 54 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ 55 56 #define CONFIG_EXTRA_ENV_SETTINGS \ 57 "script=boot.scr\0" \ 58 "uimage=uImage\0" \ 59 "mmcdev=0\0" \ 60 "mmcpart=2\0" \ 61 "mmcroot=/dev/mmcblk0p3 rw\0" \ 62 "mmcrootfstype=ext3 rootwait\0" \ 63 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 64 "root=${mmcroot} " \ 65 "rootfstype=${mmcrootfstype}\0" \ 66 "loadbootscript=" \ 67 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 68 "bootscript=echo Running bootscript from mmc ...; " \ 69 "source\0" \ 70 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 71 "mmcboot=echo Booting from mmc ...; " \ 72 "run mmcargs; " \ 73 "bootm\0" \ 74 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 75 "root=/dev/nfs " \ 76 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 77 "netboot=echo Booting from net ...; " \ 78 "run netargs; " \ 79 "dhcp ${uimage}; bootm\0" \ 80 81 #define CONFIG_BOOTCOMMAND \ 82 "mmc dev ${mmcdev}; if mmc rescan; then " \ 83 "if run loadbootscript; then " \ 84 "run bootscript; " \ 85 "else " \ 86 "if run loaduimage; then " \ 87 "run mmcboot; " \ 88 "else run netboot; " \ 89 "fi; " \ 90 "fi; " \ 91 "else run netboot; fi" 92 #define CONFIG_ARP_TIMEOUT 200UL 93 94 /* Miscellaneous configurable options */ 95 96 #define CONFIG_SYS_MEMTEST_START 0x70000000 97 #define CONFIG_SYS_MEMTEST_END 0x70010000 98 99 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 100 101 /* Physical Memory Map */ 102 #define CONFIG_NR_DRAM_BANKS 2 103 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 104 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 105 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 106 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024) 107 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE) 108 109 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 110 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 111 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 112 113 #define CONFIG_SYS_INIT_SP_OFFSET \ 114 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 115 #define CONFIG_SYS_INIT_SP_ADDR \ 116 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 117 118 /* environment organization */ 119 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 120 #define CONFIG_ENV_SIZE (8 * 1024) 121 #define CONFIG_SYS_MMC_ENV_DEV 0 122 123 #endif /* __CONFIG_H */ 124