1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2011 Freescale Semiconductor, Inc. 4 * Jason Liu <r64343@freescale.com> 5 * 6 * Configuration settings for Freescale MX53 low cost board. 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include <asm/arch/imx-regs.h> 13 14 #define CONSOLE_DEV "ttymxc0" 15 16 #define CONFIG_CMDLINE_TAG 17 #define CONFIG_SETUP_MEMORY_TAGS 18 #define CONFIG_INITRD_TAG 19 20 #define CONFIG_SYS_FSL_CLK 21 22 /* Size of malloc() pool */ 23 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 24 25 #define CONFIG_HW_WATCHDOG 26 #define CONFIG_IMX_WATCHDOG 27 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000 28 29 #define CONFIG_BOARD_LATE_INIT 30 #define CONFIG_REVISION_TAG 31 32 #define CONFIG_MXC_UART 33 #define CONFIG_MXC_UART_BASE UART1_BASE 34 35 /* MMC Configs */ 36 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 37 #define CONFIG_SYS_FSL_ESDHC_NUM 2 38 39 /* Eth Configs */ 40 41 #define CONFIG_FEC_MXC 42 #define IMX_FEC_BASE FEC_BASE_ADDR 43 #define CONFIG_FEC_MXC_PHYADDR 0x1F 44 45 /* USB Configs */ 46 #define CONFIG_USB_EHCI_MX5 47 #define CONFIG_USB_HOST_ETHER 48 #define CONFIG_USB_ETHER_ASIX 49 #define CONFIG_USB_ETHER_MCS7830 50 #define CONFIG_USB_ETHER_SMSC95XX 51 #define CONFIG_MXC_USB_PORT 1 52 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 53 #define CONFIG_MXC_USB_FLAGS 0 54 55 #define CONFIG_SYS_RTC_BUS_NUM 2 56 #define CONFIG_SYS_I2C_RTC_ADDR 0x30 57 58 /* I2C Configs */ 59 #define CONFIG_SYS_I2C 60 #define CONFIG_SYS_I2C_MXC 61 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 62 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 63 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 64 65 /* PMIC Controller */ 66 #define CONFIG_POWER 67 #define CONFIG_POWER_I2C 68 #define CONFIG_DIALOG_POWER 69 #define CONFIG_POWER_FSL 70 #define CONFIG_POWER_FSL_MC13892 71 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 72 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 73 74 /* allow to overwrite serial and ethaddr */ 75 #define CONFIG_ENV_OVERWRITE 76 #define CONFIG_BAUDRATE 115200 77 78 /* Command definition */ 79 80 #define CONFIG_ETHPRIME "FEC0" 81 82 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ 83 84 #define PPD_CONFIG_NFS \ 85 "nfsserver=192.168.252.95\0" \ 86 "gatewayip=192.168.252.95\0" \ 87 "netmask=255.255.255.0\0" \ 88 "ipaddr=192.168.252.99\0" \ 89 "kernsize=0x2000\0" \ 90 "use_dhcp=0\0" \ 91 "nfsroot=/opt/springdale/rd\0" \ 92 "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \ 93 "${kern_ipconf} nfsroot=${nfsserver}:${nfsroot},v3,tcp rw\0" \ 94 "choose_ip=if test $use_dhcp = 1; then set kern_ipconf ip=dhcp; " \ 95 "set getcmd dhcp; else set kern_ipconf " \ 96 "ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off; " \ 97 "set getcmd tftp; fi\0" \ 98 "nfs=run choose_ip setargs bootargs_nfs; ${getcmd} ${loadaddr} " \ 99 "${nfsserver}:${image}; bootm ${loadaddr}\0" \ 100 101 #define CONFIG_EXTRA_ENV_SETTINGS \ 102 PPD_CONFIG_NFS \ 103 "image=/boot/fitImage\0" \ 104 "fdt_high=0xffffffff\0" \ 105 "dev=mmc\0" \ 106 "devnum=0\0" \ 107 "rootdev=mmcblk0p\0" \ 108 "quiet=quiet loglevel=0\0" \ 109 "console=" CONSOLE_DEV "\0" \ 110 "lvds=ldb\0" \ 111 "setargs=setenv bootargs ${lvds} jtag=on mem=2G " \ 112 "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \ 113 "console=${console} ${rtc_status}\0" \ 114 "bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \ 115 "rootwait ${bootargs}\0" \ 116 "doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \ 117 "then setenv quiet; fi\0" \ 118 "hasfirstboot=ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \ 119 "/boot/bootcause/firstboot\0" \ 120 "swappartitions=setexpr partnum 3 - ${partnum}\0" \ 121 "failbootcmd=" \ 122 "ppd_lcd_enable; " \ 123 "msg=\"Monitor failed to start. " \ 124 "Try again, or contact GE Service for support.\"; " \ 125 "echo $msg; " \ 126 "setenv stdout vga; " \ 127 "echo \"\n\n\n\n \" $msg; " \ 128 "setenv stdout serial; " \ 129 "mw.b 0x7000A000 0xbc; " \ 130 "mw.b 0x7000A001 0x00; " \ 131 "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \ 132 "altbootcmd=" \ 133 "run doquiet; " \ 134 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \ 135 "run hasfirstboot || setenv partnum 0; " \ 136 "if test ${partnum} != 0; then " \ 137 "setenv bootcause REVERT; " \ 138 "run swappartitions loadimage doboot; " \ 139 "fi; " \ 140 "run failbootcmd\0" \ 141 "loadimage=" \ 142 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ 143 "doboot=" \ 144 "echo Booting from ${dev}:${devnum}:${partnum} ...; " \ 145 "run setargs; " \ 146 "run bootargs_emmc; " \ 147 "bootm ${loadaddr}\0" \ 148 "tryboot=" \ 149 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \ 150 "run loadimage || run swappartitions && run loadimage || " \ 151 "setenv partnum 0 && echo MISSING IMAGE;" \ 152 "run doboot; " \ 153 "run failbootcmd\0" \ 154 "video-mode=" \ 155 "lcd:800x480-24@60,monitor=lcd\0" \ 156 157 #define CONFIG_MMCBOOTCOMMAND \ 158 "if mmc dev ${devnum}; then " \ 159 "run doquiet; " \ 160 "run tryboot; " \ 161 "fi; " \ 162 163 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND 164 165 #define CONFIG_ARP_TIMEOUT 200UL 166 167 /* Miscellaneous configurable options */ 168 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 169 170 #define CONFIG_SYS_MAXARGS 48 /* max number of command args */ 171 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 172 173 #define CONFIG_SYS_MEMTEST_START 0x70000000 174 #define CONFIG_SYS_MEMTEST_END 0x70010000 175 176 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 177 178 /* Physical Memory Map */ 179 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 180 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 181 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 182 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 183 #define PHYS_SDRAM_SIZE (gd->ram_size) 184 185 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 186 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 187 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 188 189 #define CONFIG_SYS_INIT_SP_OFFSET \ 190 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 191 #define CONFIG_SYS_INIT_SP_ADDR \ 192 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 193 194 /* FLASH and environment organization */ 195 #define CONFIG_ENV_OFFSET (12 * 64 * 1024) 196 #define CONFIG_ENV_SIZE (10 * 1024) 197 #define CONFIG_SYS_MMC_ENV_DEV 0 198 199 #define CONFIG_CMD_FUSE 200 #define CONFIG_FSL_IIM 201 202 #define CONFIG_SYS_I2C_SPEED 100000 203 204 /* I2C1 */ 205 #define CONFIG_SYS_NUM_I2C_BUSES 9 206 #define CONFIG_SYS_I2C_MAX_HOPS 1 207 #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ 208 {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \ 209 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ 210 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ 211 {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \ 212 {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \ 213 {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \ 214 {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \ 215 {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \ 216 } 217 218 #define CONFIG_BCH 219 220 /* Backlight Control */ 221 #define CONFIG_PWM_IMX 222 #define CONFIG_IMX6_PWM_PER_CLK 66666000 223 224 /* Framebuffer and LCD */ 225 #ifdef CONFIG_VIDEO 226 #define CONFIG_VIDEO_IPUV3 227 #endif 228 229 #endif /* __CONFIG_H */ 230