1 /* 2 * Copyright (C) 2011 Freescale Semiconductor, Inc. 3 * Jason Liu <r64343@freescale.com> 4 * 5 * Configuration settings for Freescale MX53 low cost board. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #include <asm/arch/imx-regs.h> 14 15 #define CONSOLE_DEV "ttymxc0" 16 17 #define CONFIG_CMDLINE_TAG 18 #define CONFIG_SETUP_MEMORY_TAGS 19 #define CONFIG_INITRD_TAG 20 21 #define CONFIG_SYS_FSL_CLK 22 23 /* Size of malloc() pool */ 24 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 25 26 #define CONFIG_HW_WATCHDOG 27 #define CONFIG_IMX_WATCHDOG 28 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000 29 30 #define CONFIG_MISC_INIT_R 31 #define CONFIG_BOARD_LATE_INIT 32 #define CONFIG_MXC_GPIO 33 #define CONFIG_REVISION_TAG 34 35 #define CONFIG_MXC_UART 36 #define CONFIG_MXC_UART_BASE UART1_BASE 37 38 /* MMC Configs */ 39 #define CONFIG_FSL_ESDHC 40 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 41 #define CONFIG_SYS_FSL_ESDHC_NUM 2 42 43 #define CONFIG_SUPPORT_RAW_INITRD /* bootz raw initrd support */ 44 45 /* Eth Configs */ 46 #define CONFIG_MII 47 48 #define CONFIG_FEC_MXC 49 #define IMX_FEC_BASE FEC_BASE_ADDR 50 #define CONFIG_FEC_MXC_PHYADDR 0x1F 51 52 /* USB Configs */ 53 #define CONFIG_USB_EHCI_MX5 54 #define CONFIG_USB_HOST_ETHER 55 #define CONFIG_USB_ETHER_ASIX 56 #define CONFIG_USB_ETHER_MCS7830 57 #define CONFIG_USB_ETHER_SMSC95XX 58 #define CONFIG_MXC_USB_PORT 1 59 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 60 #define CONFIG_MXC_USB_FLAGS 0 61 62 #define CONFIG_SYS_RTC_BUS_NUM 2 63 #define CONFIG_SYS_I2C_RTC_ADDR 0x30 64 65 /* I2C Configs */ 66 #define CONFIG_SYS_I2C 67 #define CONFIG_SYS_I2C_MXC 68 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 69 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 70 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 71 72 /* PMIC Controller */ 73 #define CONFIG_POWER 74 #define CONFIG_POWER_I2C 75 #define CONFIG_DIALOG_POWER 76 #define CONFIG_POWER_FSL 77 #define CONFIG_POWER_FSL_MC13892 78 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 79 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 80 81 /* allow to overwrite serial and ethaddr */ 82 #define CONFIG_ENV_OVERWRITE 83 #define CONFIG_CONS_INDEX 1 84 #define CONFIG_BAUDRATE 115200 85 86 /* Command definition */ 87 #define CONFIG_SUPPORT_RAW_INITRD 88 89 #define CONFIG_ETHPRIME "FEC0" 90 91 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ 92 #define CONFIG_SYS_TEXT_BASE 0x77800000 93 94 #define PPD_CONFIG_NFS \ 95 "nfsserver=192.168.252.95\0" \ 96 "gatewayip=192.168.252.95\0" \ 97 "netmask=255.255.255.0\0" \ 98 "ipaddr=192.168.252.99\0" \ 99 "kernsize=0x2000\0" \ 100 "use_dhcp=0\0" \ 101 "nfsroot=/opt/springdale/rd\0" \ 102 "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \ 103 "${kern_ipconf} nfsroot=${nfsserver}:${nfsroot},v3,tcp rw\0" \ 104 "choose_ip=if test $use_dhcp = 1; then set kern_ipconf ip=dhcp; " \ 105 "set getcmd dhcp; else set kern_ipconf " \ 106 "ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off; " \ 107 "set getcmd tftp; fi\0" \ 108 "nfs=run choose_ip setargs bootargs_nfs; ${getcmd} ${loadaddr} " \ 109 "${nfsserver}:${image}; bootm ${loadaddr}\0" \ 110 111 #define CONFIG_EXTRA_ENV_SETTINGS \ 112 PPD_CONFIG_NFS \ 113 "bootlimit=10\0" \ 114 "image=/boot/fitImage\0" \ 115 "fdt_high=0xffffffff\0" \ 116 "dev=mmc\0" \ 117 "devnum=0\0" \ 118 "rootdev=mmcblk0p\0" \ 119 "quiet=quiet loglevel=0\0" \ 120 "console=" CONSOLE_DEV "\0" \ 121 "lvds=ldb\0" \ 122 "setargs=setenv bootargs ${lvds} jtag=on mem=2G " \ 123 "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \ 124 "console=${console} ${rtc_status}\0" \ 125 "bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \ 126 "rootwait ${bootargs}\0" \ 127 "doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \ 128 "then setenv quiet; fi\0" \ 129 "hasfirstboot=ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \ 130 "/boot/bootcause/firstboot\0" \ 131 "swappartitions=setexpr partnum 3 - ${partnum}\0" \ 132 "failbootcmd=" \ 133 "ppd_lcd_enable; " \ 134 "msg=\"Monitor failed to start. " \ 135 "Try again, or contact GE Service for support.\"; " \ 136 "echo $msg; " \ 137 "setenv stdout vga; " \ 138 "echo \"\n\n\n\n \" $msg; " \ 139 "setenv stdout serial; " \ 140 "mw.b 0x7000A000 0xbc; " \ 141 "mw.b 0x7000A001 0x00; " \ 142 "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \ 143 "altbootcmd=" \ 144 "run doquiet; " \ 145 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \ 146 "run hasfirstboot || setenv partnum 0; " \ 147 "if test ${partnum} != 0; then " \ 148 "setenv bootcause REVERT; " \ 149 "run swappartitions loadimage doboot; " \ 150 "fi; " \ 151 "run failbootcmd\0" \ 152 "loadimage=" \ 153 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ 154 "doboot=" \ 155 "echo Booting from ${dev}:${devnum}:${partnum} ...; " \ 156 "run setargs; " \ 157 "run bootargs_emmc; " \ 158 "bootm ${loadaddr}\0" \ 159 "tryboot=" \ 160 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \ 161 "run loadimage || run swappartitions && run loadimage || " \ 162 "setenv partnum 0 && echo MISSING IMAGE;" \ 163 "run doboot; " \ 164 "run failbootcmd\0" \ 165 "video-mode=" \ 166 "lcd:800x480-24@60,monitor=lcd\0" \ 167 168 #define CONFIG_MMCBOOTCOMMAND \ 169 "if mmc dev ${devnum}; then " \ 170 "run doquiet; " \ 171 "run tryboot; " \ 172 "fi; " \ 173 174 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND 175 176 #define CONFIG_ARP_TIMEOUT 200UL 177 178 /* Miscellaneous configurable options */ 179 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 180 #define CONFIG_AUTO_COMPLETE 181 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 182 183 #define CONFIG_SYS_MAXARGS 48 /* max number of command args */ 184 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 185 186 #define CONFIG_SYS_MEMTEST_START 0x70000000 187 #define CONFIG_SYS_MEMTEST_END 0x70010000 188 189 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 190 191 #define CONFIG_CMDLINE_EDITING 192 193 /* Physical Memory Map */ 194 #define CONFIG_NR_DRAM_BANKS 2 195 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 196 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 197 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 198 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 199 #define PHYS_SDRAM_SIZE (gd->ram_size) 200 201 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 202 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 203 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 204 205 #define CONFIG_SYS_INIT_SP_OFFSET \ 206 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 207 #define CONFIG_SYS_INIT_SP_ADDR \ 208 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 209 210 /* FLASH and environment organization */ 211 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 212 #define CONFIG_ENV_SIZE (8 * 1024) 213 #define CONFIG_ENV_IS_IN_MMC 214 #define CONFIG_SYS_MMC_ENV_DEV 0 215 216 #define CONFIG_CMD_FUSE 217 #define CONFIG_FSL_IIM 218 219 #define CONFIG_SYS_I2C_SPEED 100000 220 221 /* I2C1 */ 222 #define CONFIG_SYS_NUM_I2C_BUSES 9 223 #define CONFIG_SYS_I2C_MAX_HOPS 1 224 #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ 225 {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \ 226 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ 227 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ 228 {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \ 229 {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \ 230 {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \ 231 {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \ 232 {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \ 233 } 234 235 #define CONFIG_BCH 236 237 #define CONFIG_BOOTCOUNT_LIMIT 238 239 /* Backlight Control */ 240 #define CONFIG_PWM_IMX 241 #define CONFIG_IMX6_PWM_PER_CLK 66666000 242 243 /* Framebuffer and LCD */ 244 #ifdef CONFIG_VIDEO 245 #define CONFIG_VIDEO_IPUV3 246 #endif 247 248 #endif /* __CONFIG_H */ 249