1 /* 2 * Copyright (C) 2011 Freescale Semiconductor, Inc. 3 * Jason Liu <r64343@freescale.com> 4 * 5 * Configuration settings for Freescale MX53 low cost board. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #define CONFIG_MX53 14 15 #define CONFIG_DISPLAY_BOARDINFO 16 17 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO 18 19 #include <asm/arch/imx-regs.h> 20 21 #define CONFIG_CMDLINE_TAG 22 #define CONFIG_SETUP_MEMORY_TAGS 23 #define CONFIG_INITRD_TAG 24 25 #define CONFIG_SYS_GENERIC_BOARD 26 27 #define CONFIG_DISPLAY_CPUINFO 28 29 /* Size of malloc() pool */ 30 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 31 32 #define CONFIG_BOARD_EARLY_INIT_F 33 #define CONFIG_BOARD_LATE_INIT 34 #define CONFIG_MXC_GPIO 35 #define CONFIG_REVISION_TAG 36 37 #define CONFIG_MXC_UART 38 #define CONFIG_MXC_UART_BASE UART1_BASE 39 40 /* MMC Configs */ 41 #define CONFIG_FSL_ESDHC 42 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 43 #define CONFIG_SYS_FSL_ESDHC_NUM 2 44 45 #define CONFIG_MMC 46 #define CONFIG_CMD_MMC 47 #define CONFIG_GENERIC_MMC 48 #define CONFIG_CMD_FAT 49 #define CONFIG_CMD_EXT2 50 #define CONFIG_DOS_PARTITION 51 52 /* Eth Configs */ 53 #define CONFIG_MII 54 55 #define CONFIG_FEC_MXC 56 #define IMX_FEC_BASE FEC_BASE_ADDR 57 #define CONFIG_FEC_MXC_PHYADDR 0x1F 58 59 #define CONFIG_CMD_PING 60 #define CONFIG_CMD_DHCP 61 #define CONFIG_CMD_MII 62 #define CONFIG_CMD_NET 63 64 /* USB Configs */ 65 #define CONFIG_CMD_USB 66 #define CONFIG_CMD_FAT 67 #define CONFIG_USB_EHCI 68 #define CONFIG_USB_EHCI_MX5 69 #define CONFIG_USB_STORAGE 70 #define CONFIG_USB_HOST_ETHER 71 #define CONFIG_USB_ETHER_ASIX 72 #define CONFIG_USB_ETHER_MCS7830 73 #define CONFIG_USB_ETHER_SMSC95XX 74 #define CONFIG_MXC_USB_PORT 1 75 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 76 #define CONFIG_MXC_USB_FLAGS 0 77 78 /* I2C Configs */ 79 #define CONFIG_SYS_I2C 80 #define CONFIG_SYS_I2C_MXC 81 82 /* PMIC Controller */ 83 #define CONFIG_POWER 84 #define CONFIG_POWER_I2C 85 #define CONFIG_DIALOG_POWER 86 #define CONFIG_POWER_FSL 87 #define CONFIG_POWER_FSL_MC13892 88 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 89 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 90 91 /* allow to overwrite serial and ethaddr */ 92 #define CONFIG_ENV_OVERWRITE 93 #define CONFIG_CONS_INDEX 1 94 #define CONFIG_BAUDRATE 115200 95 96 /* Command definition */ 97 #include <config_cmd_default.h> 98 #define CONFIG_CMD_BOOTZ 99 #define CONFIG_SUPPORT_RAW_INITRD 100 101 #undef CONFIG_CMD_IMLS 102 103 #define CONFIG_BOOTDELAY 1 104 105 #define CONFIG_ETHPRIME "FEC0" 106 107 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ 108 #define CONFIG_SYS_TEXT_BASE 0x77800000 109 110 #define CONFIG_EXTRA_ENV_SETTINGS \ 111 "script=boot.scr\0" \ 112 "image=zImage\0" \ 113 "fdt_addr=0x71000000\0" \ 114 "boot_fdt=try\0" \ 115 "ip_dyn=yes\0" \ 116 "mmcdev=0\0" \ 117 "mmcpart=1\0" \ 118 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 119 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \ 120 "loadbootscript=" \ 121 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 122 "bootscript=echo Running bootscript from mmc ...; " \ 123 "source\0" \ 124 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 125 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 126 "mmcboot=echo Booting from mmc ...; " \ 127 "run mmcargs; " \ 128 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 129 "if run loadfdt; then " \ 130 "bootz ${loadaddr} - ${fdt_addr}; " \ 131 "else " \ 132 "if test ${boot_fdt} = try; then " \ 133 "bootz; " \ 134 "else " \ 135 "echo WARN: Cannot load the DT; " \ 136 "fi; " \ 137 "fi; " \ 138 "else " \ 139 "bootz; " \ 140 "fi;\0" \ 141 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 142 "root=/dev/nfs " \ 143 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 144 "netboot=echo Booting from net ...; " \ 145 "run netargs; " \ 146 "if test ${ip_dyn} = yes; then " \ 147 "setenv get_cmd dhcp; " \ 148 "else " \ 149 "setenv get_cmd tftp; " \ 150 "fi; " \ 151 "${get_cmd} ${image}; " \ 152 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 153 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 154 "bootz ${loadaddr} - ${fdt_addr}; " \ 155 "else " \ 156 "if test ${boot_fdt} = try; then " \ 157 "bootz; " \ 158 "else " \ 159 "echo ERROR: Cannot load the DT; " \ 160 "exit; " \ 161 "fi; " \ 162 "fi; " \ 163 "else " \ 164 "bootz; " \ 165 "fi;\0" 166 167 #define CONFIG_BOOTCOMMAND \ 168 "mmc dev ${mmcdev}; if mmc rescan; then " \ 169 "if run loadbootscript; then " \ 170 "run bootscript; " \ 171 "else " \ 172 "if run loadimage; then " \ 173 "run mmcboot; " \ 174 "else run netboot; " \ 175 "fi; " \ 176 "fi; " \ 177 "else run netboot; fi" 178 179 #define CONFIG_ARP_TIMEOUT 200UL 180 181 /* Miscellaneous configurable options */ 182 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 183 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 184 #define CONFIG_AUTO_COMPLETE 185 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 186 187 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 188 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 189 190 #define CONFIG_SYS_MEMTEST_START 0x70000000 191 #define CONFIG_SYS_MEMTEST_END 0x70010000 192 193 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 194 195 #define CONFIG_CMDLINE_EDITING 196 197 /* Physical Memory Map */ 198 #define CONFIG_NR_DRAM_BANKS 2 199 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 200 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 201 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 202 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 203 #define PHYS_SDRAM_SIZE (gd->ram_size) 204 205 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 206 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 207 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 208 209 #define CONFIG_SYS_INIT_SP_OFFSET \ 210 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 211 #define CONFIG_SYS_INIT_SP_ADDR \ 212 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 213 214 /* FLASH and environment organization */ 215 #define CONFIG_SYS_NO_FLASH 216 217 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 218 #define CONFIG_ENV_SIZE (8 * 1024) 219 #define CONFIG_ENV_IS_IN_MMC 220 #define CONFIG_SYS_MMC_ENV_DEV 0 221 222 #define CONFIG_OF_LIBFDT 223 224 #define CONFIG_CMD_SATA 225 #ifdef CONFIG_CMD_SATA 226 #define CONFIG_DWC_AHSATA 227 #define CONFIG_SYS_SATA_MAX_DEVICE 1 228 #define CONFIG_DWC_AHSATA_PORT_ID 0 229 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 230 #define CONFIG_LBA48 231 #define CONFIG_LIBATA 232 #endif 233 234 /* Framebuffer and LCD */ 235 #define CONFIG_PREBOOT 236 #define CONFIG_VIDEO 237 #define CONFIG_VIDEO_IPUV3 238 #define CONFIG_CFB_CONSOLE 239 #define CONFIG_VGA_AS_SINGLE_DEVICE 240 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 241 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 242 #define CONFIG_VIDEO_BMP_RLE8 243 #define CONFIG_SPLASH_SCREEN 244 #define CONFIG_BMP_16BPP 245 #define CONFIG_VIDEO_LOGO 246 #define CONFIG_IPUV3_CLK 200000000 247 248 #endif /* __CONFIG_H */ 249