1 /* 2 * Copyright (C) 2011 Freescale Semiconductor, Inc. 3 * Jason Liu <r64343@freescale.com> 4 * 5 * Configuration settings for Freescale MX53 low cost board. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO 14 15 #include <asm/arch/imx-regs.h> 16 17 #define CONFIG_CMDLINE_TAG 18 #define CONFIG_SETUP_MEMORY_TAGS 19 #define CONFIG_INITRD_TAG 20 21 #define CONFIG_SYS_FSL_CLK 22 23 /* Size of malloc() pool */ 24 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 25 26 #define CONFIG_REVISION_TAG 27 28 #define CONFIG_MXC_UART 29 #define CONFIG_MXC_UART_BASE UART1_BASE 30 31 /* MMC Configs */ 32 #define CONFIG_FSL_ESDHC 33 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 34 #define CONFIG_SYS_FSL_ESDHC_NUM 2 35 36 /* Eth Configs */ 37 #define CONFIG_MII 38 39 #define CONFIG_FEC_MXC 40 #define IMX_FEC_BASE FEC_BASE_ADDR 41 #define CONFIG_FEC_MXC_PHYADDR 0x1F 42 43 /* USB Configs */ 44 #define CONFIG_USB_EHCI_MX5 45 #define CONFIG_MXC_USB_PORT 1 46 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 47 #define CONFIG_MXC_USB_FLAGS 0 48 49 /* I2C Configs */ 50 #define CONFIG_SYS_I2C 51 #define CONFIG_SYS_I2C_MXC 52 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 53 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 54 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 55 56 /* PMIC Controller */ 57 #define CONFIG_POWER 58 #define CONFIG_POWER_I2C 59 #define CONFIG_DIALOG_POWER 60 #define CONFIG_POWER_FSL 61 #define CONFIG_POWER_FSL_MC13892 62 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 63 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 64 65 /* allow to overwrite serial and ethaddr */ 66 #define CONFIG_ENV_OVERWRITE 67 #define CONFIG_CONS_INDEX 1 68 69 /* Command definition */ 70 #define CONFIG_SUPPORT_RAW_INITRD 71 72 73 #define CONFIG_ETHPRIME "FEC0" 74 75 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ 76 #define CONFIG_SYS_TEXT_BASE 0x77800000 77 78 #define CONFIG_EXTRA_ENV_SETTINGS \ 79 "script=boot.scr\0" \ 80 "image=zImage\0" \ 81 "fdt_addr=0x71000000\0" \ 82 "boot_fdt=try\0" \ 83 "ip_dyn=yes\0" \ 84 "mmcdev=0\0" \ 85 "mmcpart=1\0" \ 86 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 87 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \ 88 "loadbootscript=" \ 89 "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 90 "bootscript=echo Running bootscript from mmc ...; " \ 91 "source\0" \ 92 "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 93 "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 94 "mmcboot=echo Booting from mmc ...; " \ 95 "run mmcargs; " \ 96 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 97 "if run loadfdt; then " \ 98 "bootz ${loadaddr} - ${fdt_addr}; " \ 99 "else " \ 100 "if test ${boot_fdt} = try; then " \ 101 "bootz; " \ 102 "else " \ 103 "echo WARN: Cannot load the DT; " \ 104 "fi; " \ 105 "fi; " \ 106 "else " \ 107 "bootz; " \ 108 "fi;\0" \ 109 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 110 "root=/dev/nfs " \ 111 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 112 "netboot=echo Booting from net ...; " \ 113 "run netargs; " \ 114 "if test ${ip_dyn} = yes; then " \ 115 "setenv get_cmd dhcp; " \ 116 "else " \ 117 "setenv get_cmd tftp; " \ 118 "fi; " \ 119 "${get_cmd} ${image}; " \ 120 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 121 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 122 "bootz ${loadaddr} - ${fdt_addr}; " \ 123 "else " \ 124 "if test ${boot_fdt} = try; then " \ 125 "bootz; " \ 126 "else " \ 127 "echo ERROR: Cannot load the DT; " \ 128 "exit; " \ 129 "fi; " \ 130 "fi; " \ 131 "else " \ 132 "bootz; " \ 133 "fi;\0" 134 135 #define CONFIG_BOOTCOMMAND \ 136 "mmc dev ${mmcdev}; if mmc rescan; then " \ 137 "if run loadbootscript; then " \ 138 "run bootscript; " \ 139 "else " \ 140 "if run loadimage; then " \ 141 "run mmcboot; " \ 142 "else run netboot; " \ 143 "fi; " \ 144 "fi; " \ 145 "else run netboot; fi" 146 147 #define CONFIG_ARP_TIMEOUT 200UL 148 149 /* Miscellaneous configurable options */ 150 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 151 #define CONFIG_AUTO_COMPLETE 152 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 153 154 #define CONFIG_SYS_MEMTEST_START 0x70000000 155 #define CONFIG_SYS_MEMTEST_END 0x70010000 156 157 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 158 159 #define CONFIG_CMDLINE_EDITING 160 161 /* Physical Memory Map */ 162 #define CONFIG_NR_DRAM_BANKS 2 163 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 164 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 165 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 166 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 167 #define PHYS_SDRAM_SIZE (gd->ram_size) 168 169 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 170 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 171 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 172 173 #define CONFIG_SYS_INIT_SP_OFFSET \ 174 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 175 #define CONFIG_SYS_INIT_SP_ADDR \ 176 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 177 178 /* environment organization */ 179 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 180 #define CONFIG_ENV_SIZE (8 * 1024) 181 #define CONFIG_SYS_MMC_ENV_DEV 0 182 183 #ifdef CONFIG_CMD_SATA 184 #define CONFIG_SYS_SATA_MAX_DEVICE 1 185 #define CONFIG_DWC_AHSATA_PORT_ID 0 186 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 187 #define CONFIG_LBA48 188 #endif 189 190 /* Framebuffer and LCD */ 191 #define CONFIG_PREBOOT 192 #define CONFIG_VIDEO_IPUV3 193 #define CONFIG_VIDEO_BMP_RLE8 194 #define CONFIG_SPLASH_SCREEN 195 #define CONFIG_BMP_16BPP 196 #define CONFIG_VIDEO_LOGO 197 198 #endif /* __CONFIG_H */ 199