xref: /openbmc/u-boot/include/configs/mx53loco.h (revision 7ffce4f1)
1 /*
2  * Copyright (C) 2011 Freescale Semiconductor, Inc.
3  * Jason Liu <r64343@freescale.com>
4  *
5  * Configuration settings for Freescale MX53 low cost board.
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 #define CONFIG_MACH_TYPE	MACH_TYPE_MX53_LOCO
14 
15 #include <asm/arch/imx-regs.h>
16 
17 #define CONFIG_CMDLINE_TAG
18 #define CONFIG_SETUP_MEMORY_TAGS
19 #define CONFIG_INITRD_TAG
20 
21 #define CONFIG_SYS_FSL_CLK
22 
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
25 
26 #define CONFIG_MXC_GPIO
27 #define CONFIG_REVISION_TAG
28 
29 #define CONFIG_MXC_UART
30 #define CONFIG_MXC_UART_BASE	UART1_BASE
31 
32 /* MMC Configs */
33 #define CONFIG_FSL_ESDHC
34 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
35 #define CONFIG_SYS_FSL_ESDHC_NUM	2
36 
37 /* Eth Configs */
38 #define CONFIG_MII
39 
40 #define CONFIG_FEC_MXC
41 #define IMX_FEC_BASE	FEC_BASE_ADDR
42 #define CONFIG_FEC_MXC_PHYADDR	0x1F
43 
44 /* USB Configs */
45 #define CONFIG_USB_EHCI
46 #define CONFIG_USB_EHCI_MX5
47 #define CONFIG_USB_HOST_ETHER
48 #define CONFIG_USB_ETHER_ASIX
49 #define CONFIG_USB_ETHER_MCS7830
50 #define CONFIG_USB_ETHER_SMSC95XX
51 #define CONFIG_MXC_USB_PORT	1
52 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
53 #define CONFIG_MXC_USB_FLAGS	0
54 
55 /* I2C Configs */
56 #define CONFIG_SYS_I2C
57 #define CONFIG_SYS_I2C_MXC
58 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
59 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
60 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
61 
62 /* PMIC Controller */
63 #define CONFIG_POWER
64 #define CONFIG_POWER_I2C
65 #define CONFIG_DIALOG_POWER
66 #define CONFIG_POWER_FSL
67 #define CONFIG_POWER_FSL_MC13892
68 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR	0x48
69 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x8
70 
71 /* allow to overwrite serial and ethaddr */
72 #define CONFIG_ENV_OVERWRITE
73 #define CONFIG_CONS_INDEX		1
74 
75 /* Command definition */
76 #define CONFIG_SUPPORT_RAW_INITRD
77 
78 
79 #define CONFIG_ETHPRIME		"FEC0"
80 
81 #define CONFIG_LOADADDR		0x72000000	/* loadaddr env var */
82 #define CONFIG_SYS_TEXT_BASE    0x77800000
83 
84 #define CONFIG_EXTRA_ENV_SETTINGS \
85 	"script=boot.scr\0" \
86 	"image=zImage\0" \
87 	"fdt_addr=0x71000000\0" \
88 	"boot_fdt=try\0" \
89 	"ip_dyn=yes\0" \
90 	"mmcdev=0\0" \
91 	"mmcpart=1\0" \
92 	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
93 	"mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \
94 	"loadbootscript=" \
95 		"load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
96 	"bootscript=echo Running bootscript from mmc ...; " \
97 		"source\0" \
98 	"loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
99 	"loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
100 	"mmcboot=echo Booting from mmc ...; " \
101 		"run mmcargs; " \
102 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
103 			"if run loadfdt; then " \
104 				"bootz ${loadaddr} - ${fdt_addr}; " \
105 			"else " \
106 				"if test ${boot_fdt} = try; then " \
107 					"bootz; " \
108 				"else " \
109 					"echo WARN: Cannot load the DT; " \
110 				"fi; " \
111 			"fi; " \
112 		"else " \
113 			"bootz; " \
114 		"fi;\0" \
115 	"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
116 		"root=/dev/nfs " \
117 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
118 	"netboot=echo Booting from net ...; " \
119 		"run netargs; " \
120 		"if test ${ip_dyn} = yes; then " \
121 			"setenv get_cmd dhcp; " \
122 		"else " \
123 			"setenv get_cmd tftp; " \
124 		"fi; " \
125 		"${get_cmd} ${image}; " \
126 		"if test ${boot_fdt} = yes ||  test ${boot_fdt} = try; then " \
127 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
128 				"bootz ${loadaddr} - ${fdt_addr}; " \
129 			"else " \
130 				"if test ${boot_fdt} = try; then " \
131 					"bootz; " \
132 				"else " \
133 					"echo ERROR: Cannot load the DT; " \
134 					"exit; " \
135 				"fi; " \
136 			"fi; " \
137 		"else " \
138 			"bootz; " \
139 		"fi;\0"
140 
141 #define CONFIG_BOOTCOMMAND \
142 	"mmc dev ${mmcdev}; if mmc rescan; then " \
143 		"if run loadbootscript; then " \
144 			"run bootscript; " \
145 		"else " \
146 			"if run loadimage; then " \
147 				"run mmcboot; " \
148 			"else run netboot; " \
149 			"fi; " \
150 		"fi; " \
151 	"else run netboot; fi"
152 
153 #define CONFIG_ARP_TIMEOUT	200UL
154 
155 /* Miscellaneous configurable options */
156 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
157 #define CONFIG_AUTO_COMPLETE
158 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
159 
160 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
161 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
162 
163 #define CONFIG_SYS_MEMTEST_START       0x70000000
164 #define CONFIG_SYS_MEMTEST_END         0x70010000
165 
166 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
167 
168 #define CONFIG_CMDLINE_EDITING
169 
170 /* Physical Memory Map */
171 #define CONFIG_NR_DRAM_BANKS	2
172 #define PHYS_SDRAM_1			CSD0_BASE_ADDR
173 #define PHYS_SDRAM_1_SIZE		(gd->bd->bi_dram[0].size)
174 #define PHYS_SDRAM_2			CSD1_BASE_ADDR
175 #define PHYS_SDRAM_2_SIZE		(gd->bd->bi_dram[1].size)
176 #define PHYS_SDRAM_SIZE			(gd->ram_size)
177 
178 #define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
179 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
180 #define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)
181 
182 #define CONFIG_SYS_INIT_SP_OFFSET \
183 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
184 #define CONFIG_SYS_INIT_SP_ADDR \
185 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
186 
187 /* environment organization */
188 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
189 #define CONFIG_ENV_SIZE        (8 * 1024)
190 #define CONFIG_ENV_IS_IN_MMC
191 #define CONFIG_SYS_MMC_ENV_DEV 0
192 
193 #define CONFIG_CMD_SATA
194 #ifdef CONFIG_CMD_SATA
195 	#define CONFIG_DWC_AHSATA
196 	#define CONFIG_SYS_SATA_MAX_DEVICE      1
197 	#define CONFIG_DWC_AHSATA_PORT_ID       0
198 	#define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_BASE_ADDR
199 	#define CONFIG_LBA48
200 	#define CONFIG_LIBATA
201 #endif
202 
203 /* Framebuffer and LCD */
204 #define CONFIG_PREBOOT
205 #define CONFIG_VIDEO_IPUV3
206 #define CONFIG_VIDEO_BMP_RLE8
207 #define CONFIG_SPLASH_SCREEN
208 #define CONFIG_BMP_16BPP
209 #define CONFIG_VIDEO_LOGO
210 #define CONFIG_IPUV3_CLK	200000000
211 
212 #endif				/* __CONFIG_H */
213