1 /* 2 * Copyright (C) 2011 Freescale Semiconductor, Inc. 3 * Jason Liu <r64343@freescale.com> 4 * 5 * Configuration settings for Freescale MX53 low cost board. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO 14 15 #include <asm/arch/imx-regs.h> 16 17 #define CONFIG_CMDLINE_TAG 18 #define CONFIG_SETUP_MEMORY_TAGS 19 #define CONFIG_INITRD_TAG 20 21 #define CONFIG_SYS_FSL_CLK 22 23 /* Size of malloc() pool */ 24 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 25 26 #define CONFIG_REVISION_TAG 27 28 #define CONFIG_MXC_UART 29 #define CONFIG_MXC_UART_BASE UART1_BASE 30 31 /* MMC Configs */ 32 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 33 #define CONFIG_SYS_FSL_ESDHC_NUM 2 34 35 /* Eth Configs */ 36 #define CONFIG_MII 37 38 #define CONFIG_FEC_MXC 39 #define IMX_FEC_BASE FEC_BASE_ADDR 40 #define CONFIG_FEC_MXC_PHYADDR 0x1F 41 42 /* USB Configs */ 43 #define CONFIG_USB_EHCI_MX5 44 #define CONFIG_MXC_USB_PORT 1 45 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 46 #define CONFIG_MXC_USB_FLAGS 0 47 48 /* I2C Configs */ 49 #define CONFIG_SYS_I2C 50 #define CONFIG_SYS_I2C_MXC 51 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 52 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 53 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 54 55 /* PMIC Controller */ 56 #define CONFIG_POWER 57 #define CONFIG_POWER_I2C 58 #define CONFIG_DIALOG_POWER 59 #define CONFIG_POWER_FSL 60 #define CONFIG_POWER_FSL_MC13892 61 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 62 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 63 64 /* allow to overwrite serial and ethaddr */ 65 #define CONFIG_ENV_OVERWRITE 66 67 /* Command definition */ 68 69 70 #define CONFIG_ETHPRIME "FEC0" 71 72 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ 73 74 #define CONFIG_EXTRA_ENV_SETTINGS \ 75 "script=boot.scr\0" \ 76 "image=zImage\0" \ 77 "fdt_addr=0x71000000\0" \ 78 "boot_fdt=try\0" \ 79 "ip_dyn=yes\0" \ 80 "mmcdev=0\0" \ 81 "mmcpart=1\0" \ 82 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 83 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \ 84 "loadbootscript=" \ 85 "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 86 "bootscript=echo Running bootscript from mmc ...; " \ 87 "source\0" \ 88 "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 89 "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 90 "mmcboot=echo Booting from mmc ...; " \ 91 "run mmcargs; " \ 92 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 93 "if run loadfdt; then " \ 94 "bootz ${loadaddr} - ${fdt_addr}; " \ 95 "else " \ 96 "if test ${boot_fdt} = try; then " \ 97 "bootz; " \ 98 "else " \ 99 "echo WARN: Cannot load the DT; " \ 100 "fi; " \ 101 "fi; " \ 102 "else " \ 103 "bootz; " \ 104 "fi;\0" \ 105 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 106 "root=/dev/nfs " \ 107 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 108 "netboot=echo Booting from net ...; " \ 109 "run netargs; " \ 110 "if test ${ip_dyn} = yes; then " \ 111 "setenv get_cmd dhcp; " \ 112 "else " \ 113 "setenv get_cmd tftp; " \ 114 "fi; " \ 115 "${get_cmd} ${image}; " \ 116 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 117 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 118 "bootz ${loadaddr} - ${fdt_addr}; " \ 119 "else " \ 120 "if test ${boot_fdt} = try; then " \ 121 "bootz; " \ 122 "else " \ 123 "echo ERROR: Cannot load the DT; " \ 124 "exit; " \ 125 "fi; " \ 126 "fi; " \ 127 "else " \ 128 "bootz; " \ 129 "fi;\0" 130 131 #define CONFIG_BOOTCOMMAND \ 132 "mmc dev ${mmcdev}; if mmc rescan; then " \ 133 "if run loadbootscript; then " \ 134 "run bootscript; " \ 135 "else " \ 136 "if run loadimage; then " \ 137 "run mmcboot; " \ 138 "else run netboot; " \ 139 "fi; " \ 140 "fi; " \ 141 "else run netboot; fi" 142 143 #define CONFIG_ARP_TIMEOUT 200UL 144 145 /* Miscellaneous configurable options */ 146 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 147 148 #define CONFIG_SYS_MEMTEST_START 0x70000000 149 #define CONFIG_SYS_MEMTEST_END 0x70010000 150 151 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 152 153 /* Physical Memory Map */ 154 #define CONFIG_NR_DRAM_BANKS 2 155 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 156 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 157 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 158 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 159 #define PHYS_SDRAM_SIZE (gd->ram_size) 160 161 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 162 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 163 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 164 165 #define CONFIG_SYS_INIT_SP_OFFSET \ 166 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 167 #define CONFIG_SYS_INIT_SP_ADDR \ 168 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 169 170 /* environment organization */ 171 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 172 #define CONFIG_ENV_SIZE (8 * 1024) 173 #define CONFIG_SYS_MMC_ENV_DEV 0 174 175 #ifdef CONFIG_CMD_SATA 176 #define CONFIG_SYS_SATA_MAX_DEVICE 1 177 #define CONFIG_DWC_AHSATA_PORT_ID 0 178 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 179 #define CONFIG_LBA48 180 #endif 181 182 /* Framebuffer and LCD */ 183 #define CONFIG_PREBOOT 184 #define CONFIG_VIDEO_IPUV3 185 #define CONFIG_VIDEO_BMP_RLE8 186 #define CONFIG_SPLASH_SCREEN 187 #define CONFIG_BMP_16BPP 188 #define CONFIG_VIDEO_LOGO 189 190 #endif /* __CONFIG_H */ 191