xref: /openbmc/u-boot/include/configs/mx53loco.h (revision 55ed3b46)
1 /*
2  * Copyright (C) 2011 Freescale Semiconductor, Inc.
3  * Jason Liu <r64343@freescale.com>
4  *
5  * Configuration settings for Freescale MX53 low cost board.
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 #define CONFIG_MX53
14 
15 #define CONFIG_MACH_TYPE	MACH_TYPE_MX53_LOCO
16 
17 #include <asm/arch/imx-regs.h>
18 
19 #define CONFIG_CMDLINE_TAG
20 #define CONFIG_SETUP_MEMORY_TAGS
21 #define CONFIG_INITRD_TAG
22 
23 #define CONFIG_SYS_FSL_CLK
24 
25 /* Size of malloc() pool */
26 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
27 
28 #define CONFIG_BOARD_EARLY_INIT_F
29 #define CONFIG_BOARD_LATE_INIT
30 #define CONFIG_MXC_GPIO
31 #define CONFIG_REVISION_TAG
32 
33 #define CONFIG_MXC_UART
34 #define CONFIG_MXC_UART_BASE	UART1_BASE
35 
36 /* MMC Configs */
37 #define CONFIG_FSL_ESDHC
38 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
39 #define CONFIG_SYS_FSL_ESDHC_NUM	2
40 
41 #define CONFIG_GENERIC_MMC
42 #define CONFIG_DOS_PARTITION
43 
44 /* Eth Configs */
45 #define CONFIG_MII
46 
47 #define CONFIG_FEC_MXC
48 #define IMX_FEC_BASE	FEC_BASE_ADDR
49 #define CONFIG_FEC_MXC_PHYADDR	0x1F
50 
51 /* USB Configs */
52 #define CONFIG_USB_EHCI
53 #define CONFIG_USB_EHCI_MX5
54 #define CONFIG_USB_HOST_ETHER
55 #define CONFIG_USB_ETHER_ASIX
56 #define CONFIG_USB_ETHER_MCS7830
57 #define CONFIG_USB_ETHER_SMSC95XX
58 #define CONFIG_MXC_USB_PORT	1
59 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
60 #define CONFIG_MXC_USB_FLAGS	0
61 
62 /* I2C Configs */
63 #define CONFIG_SYS_I2C
64 #define CONFIG_SYS_I2C_MXC
65 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
66 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
67 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
68 
69 /* PMIC Controller */
70 #define CONFIG_POWER
71 #define CONFIG_POWER_I2C
72 #define CONFIG_DIALOG_POWER
73 #define CONFIG_POWER_FSL
74 #define CONFIG_POWER_FSL_MC13892
75 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR	0x48
76 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x8
77 
78 /* allow to overwrite serial and ethaddr */
79 #define CONFIG_ENV_OVERWRITE
80 #define CONFIG_CONS_INDEX		1
81 #define CONFIG_BAUDRATE			115200
82 
83 /* Command definition */
84 #define CONFIG_SUPPORT_RAW_INITRD
85 
86 
87 #define CONFIG_ETHPRIME		"FEC0"
88 
89 #define CONFIG_LOADADDR		0x72000000	/* loadaddr env var */
90 #define CONFIG_SYS_TEXT_BASE    0x77800000
91 
92 #define CONFIG_EXTRA_ENV_SETTINGS \
93 	"script=boot.scr\0" \
94 	"image=zImage\0" \
95 	"fdt_addr=0x71000000\0" \
96 	"boot_fdt=try\0" \
97 	"ip_dyn=yes\0" \
98 	"mmcdev=0\0" \
99 	"mmcpart=1\0" \
100 	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
101 	"mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \
102 	"loadbootscript=" \
103 		"load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
104 	"bootscript=echo Running bootscript from mmc ...; " \
105 		"source\0" \
106 	"loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
107 	"loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
108 	"mmcboot=echo Booting from mmc ...; " \
109 		"run mmcargs; " \
110 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
111 			"if run loadfdt; then " \
112 				"bootz ${loadaddr} - ${fdt_addr}; " \
113 			"else " \
114 				"if test ${boot_fdt} = try; then " \
115 					"bootz; " \
116 				"else " \
117 					"echo WARN: Cannot load the DT; " \
118 				"fi; " \
119 			"fi; " \
120 		"else " \
121 			"bootz; " \
122 		"fi;\0" \
123 	"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
124 		"root=/dev/nfs " \
125 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
126 	"netboot=echo Booting from net ...; " \
127 		"run netargs; " \
128 		"if test ${ip_dyn} = yes; then " \
129 			"setenv get_cmd dhcp; " \
130 		"else " \
131 			"setenv get_cmd tftp; " \
132 		"fi; " \
133 		"${get_cmd} ${image}; " \
134 		"if test ${boot_fdt} = yes ||  test ${boot_fdt} = try; then " \
135 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
136 				"bootz ${loadaddr} - ${fdt_addr}; " \
137 			"else " \
138 				"if test ${boot_fdt} = try; then " \
139 					"bootz; " \
140 				"else " \
141 					"echo ERROR: Cannot load the DT; " \
142 					"exit; " \
143 				"fi; " \
144 			"fi; " \
145 		"else " \
146 			"bootz; " \
147 		"fi;\0"
148 
149 #define CONFIG_BOOTCOMMAND \
150 	"mmc dev ${mmcdev}; if mmc rescan; then " \
151 		"if run loadbootscript; then " \
152 			"run bootscript; " \
153 		"else " \
154 			"if run loadimage; then " \
155 				"run mmcboot; " \
156 			"else run netboot; " \
157 			"fi; " \
158 		"fi; " \
159 	"else run netboot; fi"
160 
161 #define CONFIG_ARP_TIMEOUT	200UL
162 
163 /* Miscellaneous configurable options */
164 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
165 #define CONFIG_AUTO_COMPLETE
166 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
167 
168 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
169 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
170 
171 #define CONFIG_SYS_MEMTEST_START       0x70000000
172 #define CONFIG_SYS_MEMTEST_END         0x70010000
173 
174 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
175 
176 #define CONFIG_CMDLINE_EDITING
177 
178 /* Physical Memory Map */
179 #define CONFIG_NR_DRAM_BANKS	2
180 #define PHYS_SDRAM_1			CSD0_BASE_ADDR
181 #define PHYS_SDRAM_1_SIZE		(gd->bd->bi_dram[0].size)
182 #define PHYS_SDRAM_2			CSD1_BASE_ADDR
183 #define PHYS_SDRAM_2_SIZE		(gd->bd->bi_dram[1].size)
184 #define PHYS_SDRAM_SIZE			(gd->ram_size)
185 
186 #define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
187 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
188 #define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)
189 
190 #define CONFIG_SYS_INIT_SP_OFFSET \
191 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
192 #define CONFIG_SYS_INIT_SP_ADDR \
193 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
194 
195 /* FLASH and environment organization */
196 #define CONFIG_SYS_NO_FLASH
197 
198 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
199 #define CONFIG_ENV_SIZE        (8 * 1024)
200 #define CONFIG_ENV_IS_IN_MMC
201 #define CONFIG_SYS_MMC_ENV_DEV 0
202 
203 #define CONFIG_CMD_SATA
204 #ifdef CONFIG_CMD_SATA
205 	#define CONFIG_DWC_AHSATA
206 	#define CONFIG_SYS_SATA_MAX_DEVICE      1
207 	#define CONFIG_DWC_AHSATA_PORT_ID       0
208 	#define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_BASE_ADDR
209 	#define CONFIG_LBA48
210 	#define CONFIG_LIBATA
211 #endif
212 
213 /* Framebuffer and LCD */
214 #define CONFIG_PREBOOT
215 #define CONFIG_VIDEO_IPUV3
216 #define CONFIG_VIDEO_BMP_RLE8
217 #define CONFIG_SPLASH_SCREEN
218 #define CONFIG_BMP_16BPP
219 #define CONFIG_VIDEO_LOGO
220 #define CONFIG_IPUV3_CLK	200000000
221 
222 #endif				/* __CONFIG_H */
223