1 /* 2 * Copyright (C) 2011 Freescale Semiconductor, Inc. 3 * Jason Liu <r64343@freescale.com> 4 * 5 * Configuration settings for Freescale MX53 low cost board. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #define CONFIG_MX53 14 15 #define CONFIG_DISPLAY_BOARDINFO 16 17 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO 18 19 #include <asm/arch/imx-regs.h> 20 21 #define CONFIG_CMDLINE_TAG 22 #define CONFIG_SETUP_MEMORY_TAGS 23 #define CONFIG_INITRD_TAG 24 25 #define CONFIG_SYS_FSL_CLK 26 27 /* Size of malloc() pool */ 28 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 29 30 #define CONFIG_BOARD_EARLY_INIT_F 31 #define CONFIG_BOARD_LATE_INIT 32 #define CONFIG_MXC_GPIO 33 #define CONFIG_REVISION_TAG 34 35 #define CONFIG_MXC_UART 36 #define CONFIG_MXC_UART_BASE UART1_BASE 37 38 /* MMC Configs */ 39 #define CONFIG_FSL_ESDHC 40 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 41 #define CONFIG_SYS_FSL_ESDHC_NUM 2 42 43 #define CONFIG_MMC 44 #define CONFIG_CMD_MMC 45 #define CONFIG_GENERIC_MMC 46 #define CONFIG_CMD_FS_GENERIC 47 #define CONFIG_CMD_FAT 48 #define CONFIG_CMD_EXT2 49 #define CONFIG_DOS_PARTITION 50 51 /* Eth Configs */ 52 #define CONFIG_MII 53 54 #define CONFIG_FEC_MXC 55 #define IMX_FEC_BASE FEC_BASE_ADDR 56 #define CONFIG_FEC_MXC_PHYADDR 0x1F 57 58 #define CONFIG_CMD_PING 59 #define CONFIG_CMD_DHCP 60 #define CONFIG_CMD_MII 61 62 /* USB Configs */ 63 #define CONFIG_CMD_USB 64 #define CONFIG_CMD_FAT 65 #define CONFIG_USB_EHCI 66 #define CONFIG_USB_EHCI_MX5 67 #define CONFIG_USB_STORAGE 68 #define CONFIG_USB_HOST_ETHER 69 #define CONFIG_USB_ETHER_ASIX 70 #define CONFIG_USB_ETHER_MCS7830 71 #define CONFIG_USB_ETHER_SMSC95XX 72 #define CONFIG_MXC_USB_PORT 1 73 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 74 #define CONFIG_MXC_USB_FLAGS 0 75 76 /* I2C Configs */ 77 #define CONFIG_SYS_I2C 78 #define CONFIG_SYS_I2C_MXC 79 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 80 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 81 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 82 83 /* PMIC Controller */ 84 #define CONFIG_POWER 85 #define CONFIG_POWER_I2C 86 #define CONFIG_DIALOG_POWER 87 #define CONFIG_POWER_FSL 88 #define CONFIG_POWER_FSL_MC13892 89 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 90 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 91 92 /* allow to overwrite serial and ethaddr */ 93 #define CONFIG_ENV_OVERWRITE 94 #define CONFIG_CONS_INDEX 1 95 #define CONFIG_BAUDRATE 115200 96 97 /* Command definition */ 98 #define CONFIG_CMD_BOOTZ 99 #define CONFIG_SUPPORT_RAW_INITRD 100 101 #define CONFIG_BOOTDELAY 1 102 103 #define CONFIG_ETHPRIME "FEC0" 104 105 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ 106 #define CONFIG_SYS_TEXT_BASE 0x77800000 107 108 #define CONFIG_EXTRA_ENV_SETTINGS \ 109 "script=boot.scr\0" \ 110 "image=zImage\0" \ 111 "fdt_addr=0x71000000\0" \ 112 "boot_fdt=try\0" \ 113 "ip_dyn=yes\0" \ 114 "mmcdev=0\0" \ 115 "mmcpart=1\0" \ 116 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 117 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \ 118 "loadbootscript=" \ 119 "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 120 "bootscript=echo Running bootscript from mmc ...; " \ 121 "source\0" \ 122 "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 123 "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 124 "mmcboot=echo Booting from mmc ...; " \ 125 "run mmcargs; " \ 126 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 127 "if run loadfdt; then " \ 128 "bootz ${loadaddr} - ${fdt_addr}; " \ 129 "else " \ 130 "if test ${boot_fdt} = try; then " \ 131 "bootz; " \ 132 "else " \ 133 "echo WARN: Cannot load the DT; " \ 134 "fi; " \ 135 "fi; " \ 136 "else " \ 137 "bootz; " \ 138 "fi;\0" \ 139 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 140 "root=/dev/nfs " \ 141 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 142 "netboot=echo Booting from net ...; " \ 143 "run netargs; " \ 144 "if test ${ip_dyn} = yes; then " \ 145 "setenv get_cmd dhcp; " \ 146 "else " \ 147 "setenv get_cmd tftp; " \ 148 "fi; " \ 149 "${get_cmd} ${image}; " \ 150 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 151 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 152 "bootz ${loadaddr} - ${fdt_addr}; " \ 153 "else " \ 154 "if test ${boot_fdt} = try; then " \ 155 "bootz; " \ 156 "else " \ 157 "echo ERROR: Cannot load the DT; " \ 158 "exit; " \ 159 "fi; " \ 160 "fi; " \ 161 "else " \ 162 "bootz; " \ 163 "fi;\0" 164 165 #define CONFIG_BOOTCOMMAND \ 166 "mmc dev ${mmcdev}; if mmc rescan; then " \ 167 "if run loadbootscript; then " \ 168 "run bootscript; " \ 169 "else " \ 170 "if run loadimage; then " \ 171 "run mmcboot; " \ 172 "else run netboot; " \ 173 "fi; " \ 174 "fi; " \ 175 "else run netboot; fi" 176 177 #define CONFIG_ARP_TIMEOUT 200UL 178 179 /* Miscellaneous configurable options */ 180 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 181 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 182 #define CONFIG_AUTO_COMPLETE 183 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 184 185 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 186 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 187 188 #define CONFIG_SYS_MEMTEST_START 0x70000000 189 #define CONFIG_SYS_MEMTEST_END 0x70010000 190 191 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 192 193 #define CONFIG_CMDLINE_EDITING 194 195 /* Physical Memory Map */ 196 #define CONFIG_NR_DRAM_BANKS 2 197 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 198 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 199 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 200 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 201 #define PHYS_SDRAM_SIZE (gd->ram_size) 202 203 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 204 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 205 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 206 207 #define CONFIG_SYS_INIT_SP_OFFSET \ 208 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 209 #define CONFIG_SYS_INIT_SP_ADDR \ 210 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 211 212 /* FLASH and environment organization */ 213 #define CONFIG_SYS_NO_FLASH 214 215 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 216 #define CONFIG_ENV_SIZE (8 * 1024) 217 #define CONFIG_ENV_IS_IN_MMC 218 #define CONFIG_SYS_MMC_ENV_DEV 0 219 220 #define CONFIG_OF_LIBFDT 221 222 #define CONFIG_CMD_SATA 223 #ifdef CONFIG_CMD_SATA 224 #define CONFIG_DWC_AHSATA 225 #define CONFIG_SYS_SATA_MAX_DEVICE 1 226 #define CONFIG_DWC_AHSATA_PORT_ID 0 227 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 228 #define CONFIG_LBA48 229 #define CONFIG_LIBATA 230 #endif 231 232 /* Framebuffer and LCD */ 233 #define CONFIG_PREBOOT 234 #define CONFIG_VIDEO 235 #define CONFIG_VIDEO_IPUV3 236 #define CONFIG_CFB_CONSOLE 237 #define CONFIG_VGA_AS_SINGLE_DEVICE 238 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 239 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 240 #define CONFIG_VIDEO_BMP_RLE8 241 #define CONFIG_SPLASH_SCREEN 242 #define CONFIG_BMP_16BPP 243 #define CONFIG_VIDEO_LOGO 244 #define CONFIG_IPUV3_CLK 200000000 245 246 #endif /* __CONFIG_H */ 247