1 /* 2 * Copyright (C) 2011 Freescale Semiconductor, Inc. 3 * Jason Liu <r64343@freescale.com> 4 * 5 * Configuration settings for Freescale MX53 low cost board. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 */ 22 23 #ifndef __CONFIG_H 24 #define __CONFIG_H 25 26 #define CONFIG_MX53 27 28 #define CONFIG_SYS_MX5_HCLK 24000000 29 #define CONFIG_SYS_MX5_CLK32 32768 30 #define CONFIG_DISPLAY_BOARDINFO 31 32 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO 33 34 #include <asm/arch/imx-regs.h> 35 36 #define CONFIG_CMDLINE_TAG 37 #define CONFIG_SETUP_MEMORY_TAGS 38 #define CONFIG_INITRD_TAG 39 40 /* Size of malloc() pool */ 41 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 42 43 #define CONFIG_BOARD_EARLY_INIT_F 44 #define CONFIG_MXC_GPIO 45 #define CONFIG_REVISION_TAG 46 47 #define CONFIG_MXC_UART 48 #define CONFIG_MXC_UART_BASE UART1_BASE 49 50 /* MMC Configs */ 51 #define CONFIG_FSL_ESDHC 52 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 53 #define CONFIG_SYS_FSL_ESDHC_NUM 2 54 55 #define CONFIG_MMC 56 #define CONFIG_CMD_MMC 57 #define CONFIG_GENERIC_MMC 58 #define CONFIG_CMD_FAT 59 #define CONFIG_CMD_EXT2 60 #define CONFIG_DOS_PARTITION 61 62 /* Eth Configs */ 63 #define CONFIG_HAS_ETH1 64 #define CONFIG_MII 65 66 #define CONFIG_FEC_MXC 67 #define IMX_FEC_BASE FEC_BASE_ADDR 68 #define CONFIG_FEC_MXC_PHYADDR 0x1F 69 70 #define CONFIG_CMD_PING 71 #define CONFIG_CMD_DHCP 72 #define CONFIG_CMD_MII 73 #define CONFIG_CMD_NET 74 75 /* USB Configs */ 76 #define CONFIG_CMD_USB 77 #define CONFIG_CMD_FAT 78 #define CONFIG_USB_EHCI 79 #define CONFIG_USB_EHCI_MX5 80 #define CONFIG_USB_STORAGE 81 #define CONFIG_USB_HOST_ETHER 82 #define CONFIG_USB_ETHER_ASIX 83 #define CONFIG_USB_ETHER_SMSC95XX 84 #define CONFIG_MXC_USB_PORT 1 85 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 86 #define CONFIG_MXC_USB_FLAGS 0 87 88 /* I2C Configs */ 89 #define CONFIG_HARD_I2C 90 #define CONFIG_I2C_MXC 91 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR 92 #define CONFIG_SYS_I2C_SPEED 100000 93 94 /* PMIC Controller */ 95 #define CONFIG_PMIC 96 #define CONFIG_PMIC_I2C 97 #define CONFIG_DIALOG_PMIC 98 #define CONFIG_PMIC_FSL 99 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 100 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 101 102 /* allow to overwrite serial and ethaddr */ 103 #define CONFIG_ENV_OVERWRITE 104 #define CONFIG_CONS_INDEX 1 105 #define CONFIG_BAUDRATE 115200 106 107 /* Command definition */ 108 #include <config_cmd_default.h> 109 110 #undef CONFIG_CMD_IMLS 111 112 #define CONFIG_BOOTDELAY 3 113 114 #define CONFIG_ETHPRIME "FEC0" 115 116 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ 117 #define CONFIG_SYS_TEXT_BASE 0x77800000 118 119 #define CONFIG_EXTRA_ENV_SETTINGS \ 120 "script=boot.scr\0" \ 121 "uimage=uImage\0" \ 122 "mmcdev=0\0" \ 123 "mmcpart=2\0" \ 124 "mmcroot=/dev/mmcblk0p3 rw\0" \ 125 "mmcrootfstype=ext3 rootwait\0" \ 126 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 127 "root=${mmcroot} " \ 128 "rootfstype=${mmcrootfstype}\0" \ 129 "loadbootscript=" \ 130 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 131 "bootscript=echo Running bootscript from mmc ...; " \ 132 "source\0" \ 133 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 134 "mmcboot=echo Booting from mmc ...; " \ 135 "run mmcargs; " \ 136 "bootm\0" \ 137 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 138 "root=/dev/nfs " \ 139 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 140 "netboot=echo Booting from net ...; " \ 141 "run netargs; " \ 142 "dhcp ${uimage}; bootm\0" \ 143 144 #define CONFIG_BOOTCOMMAND \ 145 "if mmc rescan ${mmcdev}; then " \ 146 "if run loadbootscript; then " \ 147 "run bootscript; " \ 148 "else " \ 149 "if run loaduimage; then " \ 150 "run mmcboot; " \ 151 "else run netboot; " \ 152 "fi; " \ 153 "fi; " \ 154 "else run netboot; fi" 155 156 #define CONFIG_ARP_TIMEOUT 200UL 157 158 /* Miscellaneous configurable options */ 159 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 160 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 161 #define CONFIG_SYS_PROMPT "MX53LOCO U-Boot > " 162 #define CONFIG_AUTO_COMPLETE 163 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 164 165 /* Print Buffer Size */ 166 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 167 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 168 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 169 170 #define CONFIG_SYS_MEMTEST_START 0x70000000 171 #define CONFIG_SYS_MEMTEST_END 0x70010000 172 173 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 174 175 #define CONFIG_SYS_HZ 1000 176 #define CONFIG_CMDLINE_EDITING 177 178 /* Stack sizes */ 179 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 180 181 /* Physical Memory Map */ 182 #define CONFIG_NR_DRAM_BANKS 2 183 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 184 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 185 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 186 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024) 187 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE) 188 189 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 190 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 191 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 192 193 #define CONFIG_SYS_INIT_SP_OFFSET \ 194 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 195 #define CONFIG_SYS_INIT_SP_ADDR \ 196 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 197 198 /* FLASH and environment organization */ 199 #define CONFIG_SYS_NO_FLASH 200 201 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 202 #define CONFIG_ENV_SIZE (8 * 1024) 203 #define CONFIG_ENV_IS_IN_MMC 204 #define CONFIG_SYS_MMC_ENV_DEV 0 205 206 #define CONFIG_OF_LIBFDT 207 208 #define CONFIG_CMD_SATA 209 #ifdef CONFIG_CMD_SATA 210 #define CONFIG_DWC_AHSATA 211 #define CONFIG_SYS_SATA_MAX_DEVICE 1 212 #define CONFIG_DWC_AHSATA_PORT_ID 0 213 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 214 #define CONFIG_LBA48 215 #define CONFIG_LIBATA 216 #endif 217 218 /* Framebuffer and LCD */ 219 #define CONFIG_PREBOOT 220 #define CONFIG_VIDEO 221 #define CONFIG_VIDEO_IPUV3 222 #define CONFIG_CFB_CONSOLE 223 #define CONFIG_VGA_AS_SINGLE_DEVICE 224 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 225 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 226 #define CONFIG_VIDEO_BMP_RLE8 227 #define CONFIG_SPLASH_SCREEN 228 #define CONFIG_BMP_16BPP 229 #define CONFIG_VIDEO_LOGO 230 #define CONFIG_IPUV3_CLK 133000000 231 232 #endif /* __CONFIG_H */ 233