1 /* 2 * Copyright (C) 2010 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the MX53-EVK Freescale board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK 13 14 #include <asm/arch/imx-regs.h> 15 16 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 17 #define CONFIG_SETUP_MEMORY_TAGS 18 #define CONFIG_INITRD_TAG 19 #define CONFIG_REVISION_TAG 20 21 #define CONFIG_SYS_FSL_CLK 22 23 /* Size of malloc() pool */ 24 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 25 26 #define CONFIG_MXC_GPIO 27 28 #define CONFIG_MXC_UART 29 #define CONFIG_MXC_UART_BASE UART1_BASE 30 31 /* I2C Configs */ 32 #define CONFIG_SYS_I2C 33 #define CONFIG_SYS_I2C_MXC 34 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 35 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 36 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 37 38 /* PMIC Configs */ 39 #define CONFIG_POWER 40 #define CONFIG_POWER_I2C 41 #define CONFIG_POWER_FSL 42 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8 43 #define CONFIG_POWER_FSL_MC13892 44 #define CONFIG_RTC_MC13XXX 45 46 /* MMC Configs */ 47 #define CONFIG_FSL_ESDHC 48 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 49 #define CONFIG_SYS_FSL_ESDHC_NUM 2 50 51 /* Eth Configs */ 52 #define CONFIG_MII 53 54 #define CONFIG_FEC_MXC 55 #define IMX_FEC_BASE FEC_BASE_ADDR 56 #define CONFIG_FEC_MXC_PHYADDR 0x1F 57 58 /* allow to overwrite serial and ethaddr */ 59 #define CONFIG_ENV_OVERWRITE 60 #define CONFIG_CONS_INDEX 1 61 62 /* Command definition */ 63 64 #define CONFIG_ETHPRIME "FEC0" 65 66 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ 67 #define CONFIG_SYS_TEXT_BASE 0x77800000 68 69 #define CONFIG_EXTRA_ENV_SETTINGS \ 70 "script=boot.scr\0" \ 71 "uimage=uImage\0" \ 72 "mmcdev=0\0" \ 73 "mmcpart=2\0" \ 74 "mmcroot=/dev/mmcblk0p3 rw\0" \ 75 "mmcrootfstype=ext3 rootwait\0" \ 76 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 77 "root=${mmcroot} " \ 78 "rootfstype=${mmcrootfstype}\0" \ 79 "loadbootscript=" \ 80 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 81 "bootscript=echo Running bootscript from mmc ...; " \ 82 "source\0" \ 83 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 84 "mmcboot=echo Booting from mmc ...; " \ 85 "run mmcargs; " \ 86 "bootm\0" \ 87 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 88 "root=/dev/nfs " \ 89 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 90 "netboot=echo Booting from net ...; " \ 91 "run netargs; " \ 92 "dhcp ${uimage}; bootm\0" \ 93 94 #define CONFIG_BOOTCOMMAND \ 95 "mmc dev ${mmcdev}; if mmc rescan; then " \ 96 "if run loadbootscript; then " \ 97 "run bootscript; " \ 98 "else " \ 99 "if run loaduimage; then " \ 100 "run mmcboot; " \ 101 "else run netboot; " \ 102 "fi; " \ 103 "fi; " \ 104 "else run netboot; fi" 105 106 #define CONFIG_ARP_TIMEOUT 200UL 107 108 /* Miscellaneous configurable options */ 109 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 110 #define CONFIG_AUTO_COMPLETE 111 112 #define CONFIG_SYS_MEMTEST_START 0x70000000 113 #define CONFIG_SYS_MEMTEST_END 0x70010000 114 115 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 116 117 #define CONFIG_CMDLINE_EDITING 118 119 /* Physical Memory Map */ 120 #define CONFIG_NR_DRAM_BANKS 1 121 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 122 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 123 124 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 125 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 126 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 127 128 #define CONFIG_SYS_INIT_SP_OFFSET \ 129 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 130 #define CONFIG_SYS_INIT_SP_ADDR \ 131 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 132 133 /* environment organization */ 134 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 135 #define CONFIG_ENV_SIZE (8 * 1024) 136 #define CONFIG_SYS_MMC_ENV_DEV 0 137 138 #endif /* __CONFIG_H */ 139