1 /* 2 * Copyright (C) 2010 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the MX53-EVK Freescale board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #define CONFIG_MX53 13 14 #define CONFIG_DISPLAY_CPUINFO 15 #define CONFIG_DISPLAY_BOARDINFO 16 17 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK 18 19 #include <asm/arch/imx-regs.h> 20 21 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 22 #define CONFIG_SETUP_MEMORY_TAGS 23 #define CONFIG_INITRD_TAG 24 #define CONFIG_REVISION_TAG 25 26 #define CONFIG_SYS_GENERIC_BOARD 27 28 #define CONFIG_OF_LIBFDT 29 30 /* Size of malloc() pool */ 31 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 32 33 #define CONFIG_BOARD_EARLY_INIT_F 34 #define CONFIG_BOARD_LATE_INIT 35 #define CONFIG_MXC_GPIO 36 37 #define CONFIG_MXC_UART 38 #define CONFIG_MXC_UART_BASE UART1_BASE 39 40 /* I2C Configs */ 41 #define CONFIG_CMD_I2C 42 #define CONFIG_SYS_I2C 43 #define CONFIG_SYS_I2C_MXC 44 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 45 46 /* PMIC Configs */ 47 #define CONFIG_POWER 48 #define CONFIG_POWER_I2C 49 #define CONFIG_POWER_FSL 50 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8 51 #define CONFIG_POWER_FSL_MC13892 52 #define CONFIG_RTC_MC13XXX 53 54 /* MMC Configs */ 55 #define CONFIG_FSL_ESDHC 56 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 57 #define CONFIG_SYS_FSL_ESDHC_NUM 2 58 59 #define CONFIG_MMC 60 #define CONFIG_CMD_MMC 61 #define CONFIG_GENERIC_MMC 62 #define CONFIG_CMD_FAT 63 #define CONFIG_DOS_PARTITION 64 65 /* Eth Configs */ 66 #define CONFIG_MII 67 68 #define CONFIG_FEC_MXC 69 #define IMX_FEC_BASE FEC_BASE_ADDR 70 #define CONFIG_FEC_MXC_PHYADDR 0x1F 71 72 #define CONFIG_CMD_PING 73 #define CONFIG_CMD_DHCP 74 #define CONFIG_CMD_MII 75 #define CONFIG_CMD_DATE 76 77 /* Miscellaneous commands */ 78 #define CONFIG_CMD_BMODE 79 80 /* allow to overwrite serial and ethaddr */ 81 #define CONFIG_ENV_OVERWRITE 82 #define CONFIG_CONS_INDEX 1 83 #define CONFIG_BAUDRATE 115200 84 85 /* Command definition */ 86 #define CONFIG_BOOTDELAY 3 87 88 #define CONFIG_ETHPRIME "FEC0" 89 90 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ 91 #define CONFIG_SYS_TEXT_BASE 0x77800000 92 93 #define CONFIG_EXTRA_ENV_SETTINGS \ 94 "script=boot.scr\0" \ 95 "uimage=uImage\0" \ 96 "mmcdev=0\0" \ 97 "mmcpart=2\0" \ 98 "mmcroot=/dev/mmcblk0p3 rw\0" \ 99 "mmcrootfstype=ext3 rootwait\0" \ 100 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 101 "root=${mmcroot} " \ 102 "rootfstype=${mmcrootfstype}\0" \ 103 "loadbootscript=" \ 104 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 105 "bootscript=echo Running bootscript from mmc ...; " \ 106 "source\0" \ 107 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 108 "mmcboot=echo Booting from mmc ...; " \ 109 "run mmcargs; " \ 110 "bootm\0" \ 111 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 112 "root=/dev/nfs " \ 113 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 114 "netboot=echo Booting from net ...; " \ 115 "run netargs; " \ 116 "dhcp ${uimage}; bootm\0" \ 117 118 #define CONFIG_BOOTCOMMAND \ 119 "mmc dev ${mmcdev}; if mmc rescan; then " \ 120 "if run loadbootscript; then " \ 121 "run bootscript; " \ 122 "else " \ 123 "if run loaduimage; then " \ 124 "run mmcboot; " \ 125 "else run netboot; " \ 126 "fi; " \ 127 "fi; " \ 128 "else run netboot; fi" 129 130 #define CONFIG_ARP_TIMEOUT 200UL 131 132 /* Miscellaneous configurable options */ 133 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 134 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 135 #define CONFIG_AUTO_COMPLETE 136 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 137 138 /* Print Buffer Size */ 139 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 140 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 141 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 142 143 #define CONFIG_SYS_MEMTEST_START 0x70000000 144 #define CONFIG_SYS_MEMTEST_END 0x70010000 145 146 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 147 148 #define CONFIG_CMDLINE_EDITING 149 150 /* Physical Memory Map */ 151 #define CONFIG_NR_DRAM_BANKS 1 152 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 153 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 154 155 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 156 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 157 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 158 159 #define CONFIG_SYS_INIT_SP_OFFSET \ 160 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 161 #define CONFIG_SYS_INIT_SP_ADDR \ 162 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 163 164 /* FLASH and environment organization */ 165 #define CONFIG_SYS_NO_FLASH 166 167 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 168 #define CONFIG_ENV_SIZE (8 * 1024) 169 #define CONFIG_ENV_IS_IN_MMC 170 #define CONFIG_SYS_MMC_ENV_DEV 0 171 172 #endif /* __CONFIG_H */ 173