1 /* 2 * Copyright (C) 2010 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the MX53-EVK Freescale board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #define CONFIG_MX53 13 14 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK 15 16 #include <asm/arch/imx-regs.h> 17 18 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 19 #define CONFIG_SETUP_MEMORY_TAGS 20 #define CONFIG_INITRD_TAG 21 #define CONFIG_REVISION_TAG 22 23 #define CONFIG_SYS_FSL_CLK 24 25 /* Size of malloc() pool */ 26 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 27 28 #define CONFIG_BOARD_EARLY_INIT_F 29 #define CONFIG_BOARD_LATE_INIT 30 #define CONFIG_MXC_GPIO 31 32 #define CONFIG_MXC_UART 33 #define CONFIG_MXC_UART_BASE UART1_BASE 34 35 /* I2C Configs */ 36 #define CONFIG_SYS_I2C 37 #define CONFIG_SYS_I2C_MXC 38 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 39 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 40 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 41 42 /* PMIC Configs */ 43 #define CONFIG_POWER 44 #define CONFIG_POWER_I2C 45 #define CONFIG_POWER_FSL 46 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8 47 #define CONFIG_POWER_FSL_MC13892 48 #define CONFIG_RTC_MC13XXX 49 50 /* MMC Configs */ 51 #define CONFIG_FSL_ESDHC 52 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 53 #define CONFIG_SYS_FSL_ESDHC_NUM 2 54 55 #define CONFIG_GENERIC_MMC 56 #define CONFIG_DOS_PARTITION 57 58 /* Eth Configs */ 59 #define CONFIG_MII 60 61 #define CONFIG_FEC_MXC 62 #define IMX_FEC_BASE FEC_BASE_ADDR 63 #define CONFIG_FEC_MXC_PHYADDR 0x1F 64 65 #define CONFIG_CMD_DATE 66 67 /* Miscellaneous commands */ 68 #define CONFIG_CMD_BMODE 69 70 /* allow to overwrite serial and ethaddr */ 71 #define CONFIG_ENV_OVERWRITE 72 #define CONFIG_CONS_INDEX 1 73 #define CONFIG_BAUDRATE 115200 74 75 /* Command definition */ 76 77 #define CONFIG_ETHPRIME "FEC0" 78 79 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ 80 #define CONFIG_SYS_TEXT_BASE 0x77800000 81 82 #define CONFIG_EXTRA_ENV_SETTINGS \ 83 "script=boot.scr\0" \ 84 "uimage=uImage\0" \ 85 "mmcdev=0\0" \ 86 "mmcpart=2\0" \ 87 "mmcroot=/dev/mmcblk0p3 rw\0" \ 88 "mmcrootfstype=ext3 rootwait\0" \ 89 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 90 "root=${mmcroot} " \ 91 "rootfstype=${mmcrootfstype}\0" \ 92 "loadbootscript=" \ 93 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 94 "bootscript=echo Running bootscript from mmc ...; " \ 95 "source\0" \ 96 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 97 "mmcboot=echo Booting from mmc ...; " \ 98 "run mmcargs; " \ 99 "bootm\0" \ 100 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 101 "root=/dev/nfs " \ 102 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 103 "netboot=echo Booting from net ...; " \ 104 "run netargs; " \ 105 "dhcp ${uimage}; bootm\0" \ 106 107 #define CONFIG_BOOTCOMMAND \ 108 "mmc dev ${mmcdev}; if mmc rescan; then " \ 109 "if run loadbootscript; then " \ 110 "run bootscript; " \ 111 "else " \ 112 "if run loaduimage; then " \ 113 "run mmcboot; " \ 114 "else run netboot; " \ 115 "fi; " \ 116 "fi; " \ 117 "else run netboot; fi" 118 119 #define CONFIG_ARP_TIMEOUT 200UL 120 121 /* Miscellaneous configurable options */ 122 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 123 #define CONFIG_AUTO_COMPLETE 124 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 125 126 /* Print Buffer Size */ 127 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 128 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 129 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 130 131 #define CONFIG_SYS_MEMTEST_START 0x70000000 132 #define CONFIG_SYS_MEMTEST_END 0x70010000 133 134 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 135 136 #define CONFIG_CMDLINE_EDITING 137 138 /* Physical Memory Map */ 139 #define CONFIG_NR_DRAM_BANKS 1 140 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 141 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 142 143 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 144 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 145 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 146 147 #define CONFIG_SYS_INIT_SP_OFFSET \ 148 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 149 #define CONFIG_SYS_INIT_SP_ADDR \ 150 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 151 152 /* FLASH and environment organization */ 153 #define CONFIG_SYS_NO_FLASH 154 155 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 156 #define CONFIG_ENV_SIZE (8 * 1024) 157 #define CONFIG_ENV_IS_IN_MMC 158 #define CONFIG_SYS_MMC_ENV_DEV 0 159 160 #endif /* __CONFIG_H */ 161