1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2010 Freescale Semiconductor, Inc. 4 * 5 * Configuration settings for the MX53-EVK Freescale board. 6 */ 7 8 #ifndef __CONFIG_H 9 #define __CONFIG_H 10 11 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK 12 13 #include <asm/arch/imx-regs.h> 14 15 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 16 #define CONFIG_SETUP_MEMORY_TAGS 17 #define CONFIG_INITRD_TAG 18 #define CONFIG_REVISION_TAG 19 20 #define CONFIG_SYS_FSL_CLK 21 22 /* Size of malloc() pool */ 23 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 24 25 #define CONFIG_MXC_UART 26 #define CONFIG_MXC_UART_BASE UART1_BASE 27 28 /* I2C Configs */ 29 #define CONFIG_SYS_I2C 30 #define CONFIG_SYS_I2C_MXC 31 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 32 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 33 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 34 35 /* PMIC Configs */ 36 #define CONFIG_POWER 37 #define CONFIG_POWER_I2C 38 #define CONFIG_POWER_FSL 39 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8 40 #define CONFIG_POWER_FSL_MC13892 41 #define CONFIG_RTC_MC13XXX 42 43 /* MMC Configs */ 44 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 45 #define CONFIG_SYS_FSL_ESDHC_NUM 2 46 47 /* Eth Configs */ 48 #define CONFIG_MII 49 50 #define CONFIG_FEC_MXC 51 #define IMX_FEC_BASE FEC_BASE_ADDR 52 #define CONFIG_FEC_MXC_PHYADDR 0x1F 53 54 /* allow to overwrite serial and ethaddr */ 55 #define CONFIG_ENV_OVERWRITE 56 57 /* Command definition */ 58 59 #define CONFIG_ETHPRIME "FEC0" 60 61 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ 62 63 #define CONFIG_EXTRA_ENV_SETTINGS \ 64 "script=boot.scr\0" \ 65 "uimage=uImage\0" \ 66 "mmcdev=0\0" \ 67 "mmcpart=2\0" \ 68 "mmcroot=/dev/mmcblk0p3 rw\0" \ 69 "mmcrootfstype=ext3 rootwait\0" \ 70 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 71 "root=${mmcroot} " \ 72 "rootfstype=${mmcrootfstype}\0" \ 73 "loadbootscript=" \ 74 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 75 "bootscript=echo Running bootscript from mmc ...; " \ 76 "source\0" \ 77 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 78 "mmcboot=echo Booting from mmc ...; " \ 79 "run mmcargs; " \ 80 "bootm\0" \ 81 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 82 "root=/dev/nfs " \ 83 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 84 "netboot=echo Booting from net ...; " \ 85 "run netargs; " \ 86 "dhcp ${uimage}; bootm\0" \ 87 88 #define CONFIG_BOOTCOMMAND \ 89 "mmc dev ${mmcdev}; if mmc rescan; then " \ 90 "if run loadbootscript; then " \ 91 "run bootscript; " \ 92 "else " \ 93 "if run loaduimage; then " \ 94 "run mmcboot; " \ 95 "else run netboot; " \ 96 "fi; " \ 97 "fi; " \ 98 "else run netboot; fi" 99 100 #define CONFIG_ARP_TIMEOUT 200UL 101 102 /* Miscellaneous configurable options */ 103 104 #define CONFIG_SYS_MEMTEST_START 0x70000000 105 #define CONFIG_SYS_MEMTEST_END 0x70010000 106 107 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 108 109 /* Physical Memory Map */ 110 #define CONFIG_NR_DRAM_BANKS 1 111 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 112 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 113 114 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 115 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 116 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 117 118 #define CONFIG_SYS_INIT_SP_OFFSET \ 119 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 120 #define CONFIG_SYS_INIT_SP_ADDR \ 121 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 122 123 /* environment organization */ 124 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 125 #define CONFIG_ENV_SIZE (8 * 1024) 126 #define CONFIG_SYS_MMC_ENV_DEV 0 127 128 #endif /* __CONFIG_H */ 129