1 /* 2 * Copyright (C) 2010 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the MX53-EVK Freescale board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #define CONFIG_MX53 13 14 #define CONFIG_DISPLAY_CPUINFO 15 #define CONFIG_DISPLAY_BOARDINFO 16 17 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK 18 19 #include <asm/arch/imx-regs.h> 20 21 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 22 #define CONFIG_SETUP_MEMORY_TAGS 23 #define CONFIG_INITRD_TAG 24 #define CONFIG_REVISION_TAG 25 26 27 #define CONFIG_OF_LIBFDT 28 29 /* Size of malloc() pool */ 30 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 31 32 #define CONFIG_BOARD_EARLY_INIT_F 33 #define CONFIG_BOARD_LATE_INIT 34 #define CONFIG_MXC_GPIO 35 36 #define CONFIG_MXC_UART 37 #define CONFIG_MXC_UART_BASE UART1_BASE 38 39 /* I2C Configs */ 40 #define CONFIG_CMD_I2C 41 #define CONFIG_SYS_I2C 42 #define CONFIG_SYS_I2C_MXC 43 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 44 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 45 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 46 47 /* PMIC Configs */ 48 #define CONFIG_POWER 49 #define CONFIG_POWER_I2C 50 #define CONFIG_POWER_FSL 51 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8 52 #define CONFIG_POWER_FSL_MC13892 53 #define CONFIG_RTC_MC13XXX 54 55 /* MMC Configs */ 56 #define CONFIG_FSL_ESDHC 57 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 58 #define CONFIG_SYS_FSL_ESDHC_NUM 2 59 60 #define CONFIG_MMC 61 #define CONFIG_CMD_MMC 62 #define CONFIG_GENERIC_MMC 63 #define CONFIG_CMD_FAT 64 #define CONFIG_DOS_PARTITION 65 66 /* Eth Configs */ 67 #define CONFIG_MII 68 69 #define CONFIG_FEC_MXC 70 #define IMX_FEC_BASE FEC_BASE_ADDR 71 #define CONFIG_FEC_MXC_PHYADDR 0x1F 72 73 #define CONFIG_CMD_PING 74 #define CONFIG_CMD_DHCP 75 #define CONFIG_CMD_MII 76 #define CONFIG_CMD_DATE 77 78 /* Miscellaneous commands */ 79 #define CONFIG_CMD_BMODE 80 81 /* allow to overwrite serial and ethaddr */ 82 #define CONFIG_ENV_OVERWRITE 83 #define CONFIG_CONS_INDEX 1 84 #define CONFIG_BAUDRATE 115200 85 86 /* Command definition */ 87 #define CONFIG_BOOTDELAY 3 88 89 #define CONFIG_ETHPRIME "FEC0" 90 91 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ 92 #define CONFIG_SYS_TEXT_BASE 0x77800000 93 94 #define CONFIG_EXTRA_ENV_SETTINGS \ 95 "script=boot.scr\0" \ 96 "uimage=uImage\0" \ 97 "mmcdev=0\0" \ 98 "mmcpart=2\0" \ 99 "mmcroot=/dev/mmcblk0p3 rw\0" \ 100 "mmcrootfstype=ext3 rootwait\0" \ 101 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 102 "root=${mmcroot} " \ 103 "rootfstype=${mmcrootfstype}\0" \ 104 "loadbootscript=" \ 105 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 106 "bootscript=echo Running bootscript from mmc ...; " \ 107 "source\0" \ 108 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 109 "mmcboot=echo Booting from mmc ...; " \ 110 "run mmcargs; " \ 111 "bootm\0" \ 112 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 113 "root=/dev/nfs " \ 114 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 115 "netboot=echo Booting from net ...; " \ 116 "run netargs; " \ 117 "dhcp ${uimage}; bootm\0" \ 118 119 #define CONFIG_BOOTCOMMAND \ 120 "mmc dev ${mmcdev}; if mmc rescan; then " \ 121 "if run loadbootscript; then " \ 122 "run bootscript; " \ 123 "else " \ 124 "if run loaduimage; then " \ 125 "run mmcboot; " \ 126 "else run netboot; " \ 127 "fi; " \ 128 "fi; " \ 129 "else run netboot; fi" 130 131 #define CONFIG_ARP_TIMEOUT 200UL 132 133 /* Miscellaneous configurable options */ 134 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 135 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 136 #define CONFIG_AUTO_COMPLETE 137 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 138 139 /* Print Buffer Size */ 140 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 141 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 142 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 143 144 #define CONFIG_SYS_MEMTEST_START 0x70000000 145 #define CONFIG_SYS_MEMTEST_END 0x70010000 146 147 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 148 149 #define CONFIG_CMDLINE_EDITING 150 151 /* Physical Memory Map */ 152 #define CONFIG_NR_DRAM_BANKS 1 153 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 154 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 155 156 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 157 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 158 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 159 160 #define CONFIG_SYS_INIT_SP_OFFSET \ 161 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 162 #define CONFIG_SYS_INIT_SP_ADDR \ 163 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 164 165 /* FLASH and environment organization */ 166 #define CONFIG_SYS_NO_FLASH 167 168 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 169 #define CONFIG_ENV_SIZE (8 * 1024) 170 #define CONFIG_ENV_IS_IN_MMC 171 #define CONFIG_SYS_MMC_ENV_DEV 0 172 173 #endif /* __CONFIG_H */ 174