1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG 4 * Patrick Bruenn <p.bruenn@beckhoff.com> 5 * 6 * Configuration settings for Beckhoff CX9020. 7 * 8 * Based on Freescale's Linux i.MX mx53loco.h file: 9 * Copyright (C) 2010-2011 Freescale Semiconductor. 10 */ 11 12 #ifndef __CONFIG_H 13 #define __CONFIG_H 14 15 #include <asm/arch/imx-regs.h> 16 17 #define CONFIG_CMDLINE_TAG 18 #define CONFIG_SETUP_MEMORY_TAGS 19 #define CONFIG_INITRD_TAG 20 21 #define CONFIG_SYS_FSL_CLK 22 23 /* Size of malloc() pool */ 24 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 25 26 #define CONFIG_REVISION_TAG 27 28 #define CONFIG_MXC_UART_BASE UART2_BASE 29 30 #define CONFIG_FPGA_COUNT 1 31 32 /* MMC Configs */ 33 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 34 #define CONFIG_SYS_FSL_ESDHC_NUM 2 35 36 /* bootz: zImage/initrd.img support */ 37 38 /* Eth Configs */ 39 #define IMX_FEC_BASE FEC_BASE_ADDR 40 #define CONFIG_ETHPRIME "FEC0" 41 #define CONFIG_FEC_MXC_PHYADDR 0x1F 42 43 /* USB Configs */ 44 #define CONFIG_USB_EHCI_MX5 45 #define CONFIG_MXC_USB_PORT 1 46 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 47 #define CONFIG_MXC_USB_FLAGS 0 48 49 /* allow to overwrite serial and ethaddr */ 50 #define CONFIG_ENV_OVERWRITE 51 52 /* Command definition */ 53 54 #define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */ 55 56 #define CONFIG_EXTRA_ENV_SETTINGS \ 57 "fdt_addr_r=0x71ff0000\0" \ 58 "pxefile_addr_r=0x73000000\0" \ 59 "ramdisk_addr_r=0x72000000\0" \ 60 "console=ttymxc1,115200\0" \ 61 "uenv=/boot/uEnv.txt\0" \ 62 "optargs=\0" \ 63 "cmdline=\0" \ 64 "mmcdev=0\0" \ 65 "mmcpart=1\0" \ 66 "mmcrootfstype=ext4 rootwait fixrtc\0" \ 67 "mmcargs=setenv bootargs console=${console} " \ 68 "${optargs} " \ 69 "root=/dev/mmcblk${mmcdev}p${mmcpart} ro " \ 70 "rootfstype=${mmcrootfstype} " \ 71 "${cmdline}\0" \ 72 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ 73 "loadpxe=dhcp;setenv kernel_addr_r ${loadaddr};pxe get;pxe boot;\0" \ 74 "loadrd=load mmc ${bootpart} ${ramdisk_addr_r} ${bootdir}/${rdfile};" \ 75 "setenv rdsize ${filesize}\0" \ 76 "loadfdt=echo loading ${fdt_path} ...;" \ 77 "load mmc ${bootpart} ${fdt_addr_r} ${fdt_path}\0" \ 78 "mmcboot=mmc dev ${mmcdev}; " \ 79 "if mmc rescan; then " \ 80 "echo SD/MMC found on device ${mmcdev};" \ 81 "echo Checking for: ${uenv} ...;" \ 82 "setenv bootpart ${mmcdev}:${mmcpart};" \ 83 "if test -e mmc ${bootpart} ${uenv}; then " \ 84 "load mmc ${bootpart} ${loadaddr} ${uenv};" \ 85 "env import -t ${loadaddr} ${filesize};" \ 86 "echo Loaded environment from ${uenv};" \ 87 "if test -n ${dtb}; then " \ 88 "setenv fdt_file ${dtb};" \ 89 "echo Using: dtb=${fdt_file} ...;" \ 90 "fi;" \ 91 "echo Checking for uname_r in ${uenv}...;" \ 92 "if test -n ${uname_r}; then " \ 93 "echo Running uname_boot ...;" \ 94 "run uname_boot;" \ 95 "fi;" \ 96 "fi;" \ 97 "fi;\0" \ 98 "uname_boot="\ 99 "setenv bootdir /boot; " \ 100 "setenv bootfile vmlinuz-${uname_r}; " \ 101 "setenv ccatfile /boot/ccat.rbf; " \ 102 "echo loading CCAT firmware from ${ccatfile}; " \ 103 "load mmc ${bootpart} ${loadaddr} ${ccatfile}; " \ 104 "fpga load 0 ${loadaddr} ${filesize}; " \ 105 "if test -e mmc ${bootpart} ${bootdir}/${bootfile}; then " \ 106 "echo loading ${bootdir}/${bootfile} ...; " \ 107 "run loadimage;" \ 108 "setenv fdt_path /boot/dtbs/${uname_r}/${fdt_file}; " \ 109 "if test -e mmc ${bootpart} ${fdt_path}; then " \ 110 "run loadfdt;" \ 111 "else " \ 112 "echo; echo unable to find ${fdt_file} ...;" \ 113 "echo booting legacy ...;"\ 114 "run mmcargs;" \ 115 "echo debug: [${bootargs}] ... ;" \ 116 "echo debug: [bootz ${loadaddr}] ... ;" \ 117 "bootz ${loadaddr}; " \ 118 "fi;" \ 119 "run mmcargs;" \ 120 "echo debug: [${bootargs}] ... ;" \ 121 "echo debug: [bootz ${loadaddr} - ${fdt_addr_r}];" \ 122 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 123 "else " \ 124 "echo loading from dhcp ...; " \ 125 "run loadpxe; " \ 126 "fi;\0" 127 128 #define CONFIG_BOOTCOMMAND \ 129 "run mmcboot;" 130 131 #define CONFIG_ARP_TIMEOUT 200UL 132 133 /* Miscellaneous configurable options */ 134 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 135 136 #define CONFIG_SYS_MEMTEST_START 0x70000000 137 #define CONFIG_SYS_MEMTEST_END 0x70010000 138 139 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 140 141 /* Physical Memory Map */ 142 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 143 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 144 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 145 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 146 #define PHYS_SDRAM_SIZE (gd->ram_size) 147 148 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 149 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 150 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 151 152 #define CONFIG_SYS_INIT_SP_OFFSET \ 153 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 154 #define CONFIG_SYS_INIT_SP_ADDR \ 155 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 156 157 /* environment organization */ 158 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 159 #define CONFIG_ENV_SIZE (8 * 1024) 160 #define CONFIG_SYS_MMC_ENV_DEV 0 161 162 /* Framebuffer and LCD */ 163 #define CONFIG_PREBOOT 164 #define CONFIG_VIDEO_IPUV3 165 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 166 #define CONFIG_VIDEO_BMP_RLE8 167 #define CONFIG_SPLASH_SCREEN 168 #define CONFIG_BMP_16BPP 169 #define CONFIG_VIDEO_LOGO 170 171 #endif /* __CONFIG_H */ 172