1 /* 2 * Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG 3 * Patrick Bruenn <p.bruenn@beckhoff.com> 4 * 5 * Configuration settings for Beckhoff CX9020. 6 * 7 * Based on Freescale's Linux i.MX mx53loco.h file: 8 * Copyright (C) 2010-2011 Freescale Semiconductor. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 #include <asm/arch/imx-regs.h> 17 18 #define CONFIG_CMDLINE_TAG 19 #define CONFIG_SETUP_MEMORY_TAGS 20 #define CONFIG_INITRD_TAG 21 22 #define CONFIG_SYS_FSL_CLK 23 24 /* Size of malloc() pool */ 25 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 26 27 #define CONFIG_REVISION_TAG 28 29 #define CONFIG_MXC_UART_BASE UART2_BASE 30 31 #define CONFIG_FPGA_COUNT 1 32 33 /* MMC Configs */ 34 #define CONFIG_FSL_ESDHC 35 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 36 #define CONFIG_SYS_FSL_ESDHC_NUM 2 37 38 /* bootz: zImage/initrd.img support */ 39 40 /* Eth Configs */ 41 #define CONFIG_MII 42 #define IMX_FEC_BASE FEC_BASE_ADDR 43 #define CONFIG_ETHPRIME "FEC0" 44 #define CONFIG_FEC_MXC_PHYADDR 0x1F 45 46 /* USB Configs */ 47 #define CONFIG_USB_EHCI_MX5 48 #define CONFIG_MXC_USB_PORT 1 49 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 50 #define CONFIG_MXC_USB_FLAGS 0 51 52 /* allow to overwrite serial and ethaddr */ 53 #define CONFIG_ENV_OVERWRITE 54 55 /* Command definition */ 56 57 #define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */ 58 59 #define CONFIG_EXTRA_ENV_SETTINGS \ 60 "fdt_addr_r=0x71ff0000\0" \ 61 "pxefile_addr_r=0x73000000\0" \ 62 "ramdisk_addr_r=0x72000000\0" \ 63 "console=ttymxc1,115200\0" \ 64 "uenv=/boot/uEnv.txt\0" \ 65 "optargs=\0" \ 66 "cmdline=\0" \ 67 "mmcdev=0\0" \ 68 "mmcpart=1\0" \ 69 "mmcrootfstype=ext4 rootwait fixrtc\0" \ 70 "mmcargs=setenv bootargs console=${console} " \ 71 "${optargs} " \ 72 "root=/dev/mmcblk${mmcdev}p${mmcpart} ro " \ 73 "rootfstype=${mmcrootfstype} " \ 74 "${cmdline}\0" \ 75 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ 76 "loadpxe=dhcp;setenv kernel_addr_r ${loadaddr};pxe get;pxe boot;\0" \ 77 "loadrd=load mmc ${bootpart} ${ramdisk_addr_r} ${bootdir}/${rdfile};" \ 78 "setenv rdsize ${filesize}\0" \ 79 "loadfdt=echo loading ${fdt_path} ...;" \ 80 "load mmc ${bootpart} ${fdt_addr_r} ${fdt_path}\0" \ 81 "mmcboot=mmc dev ${mmcdev}; " \ 82 "if mmc rescan; then " \ 83 "echo SD/MMC found on device ${mmcdev};" \ 84 "echo Checking for: ${uenv} ...;" \ 85 "setenv bootpart ${mmcdev}:${mmcpart};" \ 86 "if test -e mmc ${bootpart} ${uenv}; then " \ 87 "load mmc ${bootpart} ${loadaddr} ${uenv};" \ 88 "env import -t ${loadaddr} ${filesize};" \ 89 "echo Loaded environment from ${uenv};" \ 90 "if test -n ${dtb}; then " \ 91 "setenv fdt_file ${dtb};" \ 92 "echo Using: dtb=${fdt_file} ...;" \ 93 "fi;" \ 94 "echo Checking for uname_r in ${uenv}...;" \ 95 "if test -n ${uname_r}; then " \ 96 "echo Running uname_boot ...;" \ 97 "run uname_boot;" \ 98 "fi;" \ 99 "fi;" \ 100 "fi;\0" \ 101 "uname_boot="\ 102 "setenv bootdir /boot; " \ 103 "setenv bootfile vmlinuz-${uname_r}; " \ 104 "setenv ccatfile /boot/ccat.rbf; " \ 105 "echo loading CCAT firmware from ${ccatfile}; " \ 106 "load mmc ${bootpart} ${loadaddr} ${ccatfile}; " \ 107 "fpga load 0 ${loadaddr} ${filesize}; " \ 108 "if test -e mmc ${bootpart} ${bootdir}/${bootfile}; then " \ 109 "echo loading ${bootdir}/${bootfile} ...; " \ 110 "run loadimage;" \ 111 "setenv fdt_path /boot/dtbs/${uname_r}/${fdt_file}; " \ 112 "if test -e mmc ${bootpart} ${fdt_path}; then " \ 113 "run loadfdt;" \ 114 "else " \ 115 "echo; echo unable to find ${fdt_file} ...;" \ 116 "echo booting legacy ...;"\ 117 "run mmcargs;" \ 118 "echo debug: [${bootargs}] ... ;" \ 119 "echo debug: [bootz ${loadaddr}] ... ;" \ 120 "bootz ${loadaddr}; " \ 121 "fi;" \ 122 "run mmcargs;" \ 123 "echo debug: [${bootargs}] ... ;" \ 124 "echo debug: [bootz ${loadaddr} - ${fdt_addr_r}];" \ 125 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 126 "else " \ 127 "echo loading from dhcp ...; " \ 128 "run loadpxe; " \ 129 "fi;\0" 130 131 #define CONFIG_BOOTCOMMAND \ 132 "run mmcboot;" 133 134 #define CONFIG_ARP_TIMEOUT 200UL 135 136 /* Miscellaneous configurable options */ 137 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 138 139 #define CONFIG_SYS_MEMTEST_START 0x70000000 140 #define CONFIG_SYS_MEMTEST_END 0x70010000 141 142 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 143 144 /* Physical Memory Map */ 145 #define CONFIG_NR_DRAM_BANKS 2 146 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 147 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 148 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 149 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 150 #define PHYS_SDRAM_SIZE (gd->ram_size) 151 152 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 153 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 154 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 155 156 #define CONFIG_SYS_INIT_SP_OFFSET \ 157 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 158 #define CONFIG_SYS_INIT_SP_ADDR \ 159 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 160 161 /* environment organization */ 162 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 163 #define CONFIG_ENV_SIZE (8 * 1024) 164 #define CONFIG_SYS_MMC_ENV_DEV 0 165 166 /* Framebuffer and LCD */ 167 #define CONFIG_PREBOOT 168 #define CONFIG_VIDEO_IPUV3 169 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 170 #define CONFIG_VIDEO_BMP_RLE8 171 #define CONFIG_SPLASH_SCREEN 172 #define CONFIG_BMP_16BPP 173 #define CONFIG_VIDEO_LOGO 174 175 #endif /* __CONFIG_H */ 176