1 /* 2 * Copyright (C) 2011 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the MX53ARD Freescale board. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 * MA 02111-1307 USA 20 */ 21 22 #ifndef __CONFIG_H 23 #define __CONFIG_H 24 25 #define CONFIG_MX53 26 27 #define CONFIG_SYS_MX5_HCLK 24000000 28 #define CONFIG_SYS_MX5_CLK32 32768 29 #define CONFIG_DISPLAY_CPUINFO 30 #define CONFIG_DISPLAY_BOARDINFO 31 32 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD 33 34 #include <asm/arch/imx-regs.h> 35 36 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 37 #define CONFIG_REVISION_TAG 38 #define CONFIG_SETUP_MEMORY_TAGS 39 #define CONFIG_INITRD_TAG 40 41 /* Size of malloc() pool */ 42 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 43 44 #define CONFIG_BOARD_EARLY_INIT_F 45 #define CONFIG_MXC_GPIO 46 47 #define CONFIG_MXC_UART 48 #define CONFIG_SYS_MX53_UART1 49 50 /* I2C Configs */ 51 #define CONFIG_CMD_I2C 52 #define CONFIG_HARD_I2C 53 #define CONFIG_I2C_MXC 54 #define CONFIG_SYS_I2C_MX53_PORT2 55 #define CONFIG_SYS_I2C_SPEED 100000 56 #define CONFIG_SYS_I2C_SLAVE 0xfe 57 58 /* MMC Configs */ 59 #define CONFIG_FSL_ESDHC 60 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 61 #define CONFIG_SYS_FSL_ESDHC_NUM 2 62 63 #define CONFIG_MMC 64 #define CONFIG_CMD_MMC 65 #define CONFIG_GENERIC_MMC 66 #define CONFIG_CMD_FAT 67 #define CONFIG_DOS_PARTITION 68 69 /* Eth Configs */ 70 #define CONFIG_HAS_ETH1 71 #define CONFIG_MII 72 #define CONFIG_MII_GASKET 73 #define CONFIG_DISCOVER_PHY 74 75 #define CONFIG_CMD_PING 76 #define CONFIG_CMD_DHCP 77 #define CONFIG_CMD_MII 78 #define CONFIG_CMD_NET 79 80 /* allow to overwrite serial and ethaddr */ 81 #define CONFIG_ENV_OVERWRITE 82 #define CONFIG_CONS_INDEX 1 83 #define CONFIG_BAUDRATE 115200 84 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 85 86 /* Command definition */ 87 #include <config_cmd_default.h> 88 89 #undef CONFIG_CMD_IMLS 90 91 #define CONFIG_BOOTDELAY 3 92 93 #define CONFIG_ETHPRIME "smc911x" 94 95 /*Support LAN9217*/ 96 #define CONFIG_SMC911X 97 #define CONFIG_SMC911X_16_BIT 98 #define CONFIG_SMC911X_BASE CS1_BASE_ADDR 99 100 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ 101 #define CONFIG_SYS_TEXT_BASE 0x77800000 102 103 #define CONFIG_EXTRA_ENV_SETTINGS \ 104 "script=boot.scr\0" \ 105 "uimage=uImage\0" \ 106 "mmcdev=0\0" \ 107 "mmcpart=2\0" \ 108 "mmcroot=/dev/mmcblk0p3 rw\0" \ 109 "mmcrootfstype=ext3 rootwait\0" \ 110 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 111 "root=${mmcroot} " \ 112 "rootfstype=${mmcrootfstype}\0" \ 113 "loadbootscript=" \ 114 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 115 "bootscript=echo Running bootscript from mmc ...; " \ 116 "source\0" \ 117 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 118 "mmcboot=echo Booting from mmc ...; " \ 119 "run mmcargs; " \ 120 "bootm\0" \ 121 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 122 "root=/dev/nfs " \ 123 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 124 "netboot=echo Booting from net ...; " \ 125 "run netargs; " \ 126 "dhcp ${uimage}; bootm\0" \ 127 128 #define CONFIG_BOOTCOMMAND \ 129 "if mmc rescan ${mmcdev}; then " \ 130 "if run loadbootscript; then " \ 131 "run bootscript; " \ 132 "else " \ 133 "if run loaduimage; then " \ 134 "run mmcboot; " \ 135 "else run netboot; " \ 136 "fi; " \ 137 "fi; " \ 138 "else run netboot; fi" 139 #define CONFIG_ARP_TIMEOUT 200UL 140 141 /* Miscellaneous configurable options */ 142 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 143 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 144 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 145 #define CONFIG_SYS_PROMPT "MX53ARD U-Boot > " 146 #define CONFIG_AUTO_COMPLETE 147 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 148 149 /* Print Buffer Size */ 150 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 151 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 152 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 153 154 #define CONFIG_SYS_MEMTEST_START 0x70000000 155 #define CONFIG_SYS_MEMTEST_END 0x70010000 156 157 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 158 159 #define CONFIG_SYS_HZ 1000 160 #define CONFIG_CMDLINE_EDITING 161 162 /* Stack sizes */ 163 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 164 165 /* Physical Memory Map */ 166 #define CONFIG_NR_DRAM_BANKS 2 167 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 168 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 169 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 170 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024) 171 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE) 172 173 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 174 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 175 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 176 177 #define CONFIG_SYS_INIT_SP_OFFSET \ 178 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 179 #define CONFIG_SYS_INIT_SP_ADDR \ 180 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 181 182 /* FLASH and environment organization */ 183 #define CONFIG_SYS_NO_FLASH 184 185 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 186 #define CONFIG_ENV_SIZE (8 * 1024) 187 #define CONFIG_ENV_IS_IN_MMC 188 #define CONFIG_SYS_MMC_ENV_DEV 0 189 190 #define CONFIG_OF_LIBFDT 191 192 #define MX53ARD_CS1GCR1 (CSEN | DSZ(2)) 193 #define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22)) 194 #define MX53ARD_CS1RCR2 RBEN(2) 195 #define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22)) 196 197 #endif /* __CONFIG_H */ 198