1 /* 2 * Copyright (C) 2011 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the MX53ARD Freescale board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD 13 14 #include <asm/arch/imx-regs.h> 15 16 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 17 #define CONFIG_SETUP_MEMORY_TAGS 18 #define CONFIG_INITRD_TAG 19 #define CONFIG_REVISION_TAG 20 21 #define CONFIG_SYS_FSL_CLK 22 23 /* Size of malloc() pool */ 24 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 25 26 #define CONFIG_MXC_GPIO 27 28 #define CONFIG_SYS_MAX_NAND_DEVICE 1 29 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI 30 #define CONFIG_NAND_MXC 31 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI 32 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR 33 #define CONFIG_SYS_NAND_LARGEPAGE 34 #define CONFIG_MXC_NAND_HWECC 35 #define CONFIG_SYS_NAND_USE_FLASH_BBT 36 37 #define CONFIG_MXC_UART 38 #define CONFIG_MXC_UART_BASE UART1_BASE 39 40 /* I2C Configs */ 41 #define CONFIG_SYS_I2C 42 #define CONFIG_SYS_I2C_MXC 43 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 44 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 45 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 46 47 /* MMC Configs */ 48 #define CONFIG_FSL_ESDHC 49 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 50 #define CONFIG_SYS_FSL_ESDHC_NUM 2 51 52 /* Eth Configs */ 53 #define CONFIG_HAS_ETH1 54 #define CONFIG_MII 55 56 /* allow to overwrite serial and ethaddr */ 57 #define CONFIG_ENV_OVERWRITE 58 #define CONFIG_CONS_INDEX 1 59 60 /* Command definition */ 61 62 #define CONFIG_ETHPRIME "smc911x" 63 64 /*Support LAN9217*/ 65 #define CONFIG_SMC911X 66 #define CONFIG_SMC911X_16_BIT 67 #define CONFIG_SMC911X_BASE CS1_BASE_ADDR 68 69 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ 70 #define CONFIG_SYS_TEXT_BASE 0x77800000 71 72 #define CONFIG_EXTRA_ENV_SETTINGS \ 73 "script=boot.scr\0" \ 74 "uimage=zImage\0" \ 75 "console=ttymxc0\0" \ 76 "fdt_high=0xffffffff\0" \ 77 "initrd_high=0xffffffff\0" \ 78 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 79 "fdt_addr=0x78000000\0" \ 80 "boot_fdt=try\0" \ 81 "ip_dyn=yes\0" \ 82 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 83 "mmcpart=1\0" \ 84 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 85 "update_sd_firmware_filename=u-boot.imx\0" \ 86 "update_sd_firmware=" \ 87 "if test ${ip_dyn} = yes; then " \ 88 "setenv get_cmd dhcp; " \ 89 "else " \ 90 "setenv get_cmd tftp; " \ 91 "fi; " \ 92 "if mmc dev ${mmcdev}; then " \ 93 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 94 "setexpr fw_sz ${filesize} / 0x200; " \ 95 "setexpr fw_sz ${fw_sz} + 1; " \ 96 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 97 "fi; " \ 98 "fi\0" \ 99 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 100 "root=${mmcroot}\0" \ 101 "loadbootscript=" \ 102 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 103 "bootscript=echo Running bootscript from mmc ...; " \ 104 "source\0" \ 105 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 106 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 107 "mmcboot=echo Booting from mmc ...; " \ 108 "run mmcargs; " \ 109 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 110 "if run loadfdt; then " \ 111 "bootz ${loadaddr} - ${fdt_addr}; " \ 112 "else " \ 113 "if test ${boot_fdt} = try; then " \ 114 "bootz; " \ 115 "else " \ 116 "echo WARN: Cannot load the DT; " \ 117 "fi; " \ 118 "fi; " \ 119 "else " \ 120 "bootz; " \ 121 "fi;\0" \ 122 "netargs=setenv bootargs console=${console},${baudrate} " \ 123 "root=/dev/nfs " \ 124 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 125 "netboot=echo Booting from net ...; " \ 126 "run netargs; " \ 127 "if test ${ip_dyn} = yes; then " \ 128 "setenv get_cmd dhcp; " \ 129 "else " \ 130 "setenv get_cmd tftp; " \ 131 "fi; " \ 132 "${get_cmd} ${uimage}; " \ 133 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 134 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 135 "bootz ${loadaddr} - ${fdt_addr}; " \ 136 "else " \ 137 "if test ${boot_fdt} = try; then " \ 138 "bootz; " \ 139 "else " \ 140 "echo WARN: Cannot load the DT; " \ 141 "fi; " \ 142 "fi; " \ 143 "else " \ 144 "bootz; " \ 145 "fi;\0" 146 147 #define CONFIG_BOOTCOMMAND \ 148 "mmc dev ${mmcdev}; if mmc rescan; then " \ 149 "if run loadbootscript; then " \ 150 "run bootscript; " \ 151 "else " \ 152 "if run loaduimage; then " \ 153 "run mmcboot; " \ 154 "else run netboot; " \ 155 "fi; " \ 156 "fi; " \ 157 "else run netboot; fi" 158 159 #define CONFIG_ARP_TIMEOUT 200UL 160 161 /* Miscellaneous configurable options */ 162 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 163 #define CONFIG_AUTO_COMPLETE 164 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 165 166 /* Print Buffer Size */ 167 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 168 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 169 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 170 171 #define CONFIG_SYS_MEMTEST_START 0x70000000 172 #define CONFIG_SYS_MEMTEST_END 0x70010000 173 174 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 175 176 #define CONFIG_CMDLINE_EDITING 177 178 /* Physical Memory Map */ 179 #define CONFIG_NR_DRAM_BANKS 2 180 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 181 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 182 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 183 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024) 184 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE) 185 186 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 187 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 188 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 189 190 #define CONFIG_SYS_INIT_SP_OFFSET \ 191 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 192 #define CONFIG_SYS_INIT_SP_ADDR \ 193 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 194 195 /* environment organization */ 196 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 197 #define CONFIG_ENV_SIZE (8 * 1024) 198 #define CONFIG_SYS_MMC_ENV_DEV 0 199 200 #define MX53ARD_CS1GCR1 (CSEN | DSZ(2)) 201 #define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22)) 202 #define MX53ARD_CS1RCR2 RBEN(2) 203 #define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22)) 204 205 #endif /* __CONFIG_H */ 206