147c3e074SFabio Estevam /* 247c3e074SFabio Estevam * Copyright (C) 2011 Freescale Semiconductor, Inc. 347c3e074SFabio Estevam * 447c3e074SFabio Estevam * Configuration settings for the MX53ARD Freescale board. 547c3e074SFabio Estevam * 647c3e074SFabio Estevam * This program is free software; you can redistribute it and/or 747c3e074SFabio Estevam * modify it under the terms of the GNU General Public License as 847c3e074SFabio Estevam * published by the Free Software Foundation; either version 2 of 947c3e074SFabio Estevam * the License, or (at your option) any later version. 1047c3e074SFabio Estevam * 1147c3e074SFabio Estevam * This program is distributed in the hope that it will be useful, 1247c3e074SFabio Estevam * but WITHOUT ANY WARRANTY; without even the implied warranty of 1347c3e074SFabio Estevam * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1447c3e074SFabio Estevam * GNU General Public License for more details. 1547c3e074SFabio Estevam * 1647c3e074SFabio Estevam * You should have received a copy of the GNU General Public License 1747c3e074SFabio Estevam * along with this program; if not, write to the Free Software 1847c3e074SFabio Estevam * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 1947c3e074SFabio Estevam * MA 02111-1307 USA 2047c3e074SFabio Estevam */ 2147c3e074SFabio Estevam 2247c3e074SFabio Estevam #ifndef __CONFIG_H 2347c3e074SFabio Estevam #define __CONFIG_H 2447c3e074SFabio Estevam 2547c3e074SFabio Estevam #define CONFIG_MX53 2647c3e074SFabio Estevam 2747c3e074SFabio Estevam #define CONFIG_SYS_MX5_HCLK 24000000 2847c3e074SFabio Estevam #define CONFIG_SYS_MX5_CLK32 32768 2947c3e074SFabio Estevam #define CONFIG_DISPLAY_CPUINFO 3047c3e074SFabio Estevam #define CONFIG_DISPLAY_BOARDINFO 3147c3e074SFabio Estevam 327c2eababSFabio Estevam #define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD 337c2eababSFabio Estevam 3447c3e074SFabio Estevam #include <asm/arch/imx-regs.h> 3547c3e074SFabio Estevam 3647c3e074SFabio Estevam #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 3747c3e074SFabio Estevam #define CONFIG_REVISION_TAG 3847c3e074SFabio Estevam #define CONFIG_SETUP_MEMORY_TAGS 3947c3e074SFabio Estevam #define CONFIG_INITRD_TAG 4047c3e074SFabio Estevam 4147c3e074SFabio Estevam /* Size of malloc() pool */ 4247c3e074SFabio Estevam #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 4347c3e074SFabio Estevam 4447c3e074SFabio Estevam #define CONFIG_BOARD_EARLY_INIT_F 4547c3e074SFabio Estevam #define CONFIG_MXC_GPIO 4647c3e074SFabio Estevam 4747c3e074SFabio Estevam #define CONFIG_MXC_UART 4847c3e074SFabio Estevam #define CONFIG_SYS_MX53_UART1 4947c3e074SFabio Estevam 5047c3e074SFabio Estevam /* I2C Configs */ 5147c3e074SFabio Estevam #define CONFIG_CMD_I2C 5247c3e074SFabio Estevam #define CONFIG_HARD_I2C 5347c3e074SFabio Estevam #define CONFIG_I2C_MXC 5447c3e074SFabio Estevam #define CONFIG_SYS_I2C_MX53_PORT2 5547c3e074SFabio Estevam #define CONFIG_SYS_I2C_SPEED 100000 5647c3e074SFabio Estevam #define CONFIG_SYS_I2C_SLAVE 0xfe 5747c3e074SFabio Estevam 5847c3e074SFabio Estevam /* MMC Configs */ 5947c3e074SFabio Estevam #define CONFIG_FSL_ESDHC 6047c3e074SFabio Estevam #define CONFIG_SYS_FSL_ESDHC_ADDR 0 6147c3e074SFabio Estevam #define CONFIG_SYS_FSL_ESDHC_NUM 2 6247c3e074SFabio Estevam 6347c3e074SFabio Estevam #define CONFIG_MMC 6447c3e074SFabio Estevam #define CONFIG_CMD_MMC 6547c3e074SFabio Estevam #define CONFIG_GENERIC_MMC 6647c3e074SFabio Estevam #define CONFIG_CMD_FAT 6747c3e074SFabio Estevam #define CONFIG_DOS_PARTITION 6847c3e074SFabio Estevam 6947c3e074SFabio Estevam /* Eth Configs */ 7047c3e074SFabio Estevam #define CONFIG_HAS_ETH1 7147c3e074SFabio Estevam #define CONFIG_MII 7247c3e074SFabio Estevam #define CONFIG_MII_GASKET 7347c3e074SFabio Estevam #define CONFIG_DISCOVER_PHY 7447c3e074SFabio Estevam 7547c3e074SFabio Estevam #define CONFIG_CMD_PING 7647c3e074SFabio Estevam #define CONFIG_CMD_DHCP 7747c3e074SFabio Estevam #define CONFIG_CMD_MII 7847c3e074SFabio Estevam #define CONFIG_CMD_NET 7947c3e074SFabio Estevam 8047c3e074SFabio Estevam /* allow to overwrite serial and ethaddr */ 8147c3e074SFabio Estevam #define CONFIG_ENV_OVERWRITE 8247c3e074SFabio Estevam #define CONFIG_CONS_INDEX 1 8347c3e074SFabio Estevam #define CONFIG_BAUDRATE 115200 8447c3e074SFabio Estevam #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 8547c3e074SFabio Estevam 8647c3e074SFabio Estevam /* Command definition */ 8747c3e074SFabio Estevam #include <config_cmd_default.h> 8847c3e074SFabio Estevam 8947c3e074SFabio Estevam #undef CONFIG_CMD_IMLS 9047c3e074SFabio Estevam 9147c3e074SFabio Estevam #define CONFIG_BOOTDELAY 3 9247c3e074SFabio Estevam 93*28b119e9SWolfgang Grandegger #define CONFIG_ETHPRIME "smc911x" 9447c3e074SFabio Estevam 9547c3e074SFabio Estevam /*Support LAN9217*/ 9647c3e074SFabio Estevam #define CONFIG_SMC911X 9747c3e074SFabio Estevam #define CONFIG_SMC911X_16_BIT 9847c3e074SFabio Estevam #define CONFIG_SMC911X_BASE CS1_BASE_ADDR 9947c3e074SFabio Estevam 10047c3e074SFabio Estevam #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ 10147c3e074SFabio Estevam #define CONFIG_SYS_TEXT_BASE 0x77800000 10247c3e074SFabio Estevam 10347c3e074SFabio Estevam #define CONFIG_EXTRA_ENV_SETTINGS \ 10447c3e074SFabio Estevam "script=boot.scr\0" \ 10547c3e074SFabio Estevam "uimage=uImage\0" \ 10647c3e074SFabio Estevam "mmcdev=0\0" \ 10747c3e074SFabio Estevam "mmcpart=2\0" \ 10847c3e074SFabio Estevam "mmcroot=/dev/mmcblk0p3 rw\0" \ 10947c3e074SFabio Estevam "mmcrootfstype=ext3 rootwait\0" \ 11047c3e074SFabio Estevam "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 11147c3e074SFabio Estevam "root=${mmcroot} " \ 11247c3e074SFabio Estevam "rootfstype=${mmcrootfstype}\0" \ 11347c3e074SFabio Estevam "loadbootscript=" \ 11447c3e074SFabio Estevam "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 11547c3e074SFabio Estevam "bootscript=echo Running bootscript from mmc ...; " \ 11647c3e074SFabio Estevam "source\0" \ 11747c3e074SFabio Estevam "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 11847c3e074SFabio Estevam "mmcboot=echo Booting from mmc ...; " \ 11947c3e074SFabio Estevam "run mmcargs; " \ 12047c3e074SFabio Estevam "bootm\0" \ 12147c3e074SFabio Estevam "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 12247c3e074SFabio Estevam "root=/dev/nfs " \ 12347c3e074SFabio Estevam "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 12447c3e074SFabio Estevam "netboot=echo Booting from net ...; " \ 12547c3e074SFabio Estevam "run netargs; " \ 12647c3e074SFabio Estevam "dhcp ${uimage}; bootm\0" \ 12747c3e074SFabio Estevam 12847c3e074SFabio Estevam #define CONFIG_BOOTCOMMAND \ 12947c3e074SFabio Estevam "if mmc rescan ${mmcdev}; then " \ 13047c3e074SFabio Estevam "if run loadbootscript; then " \ 13147c3e074SFabio Estevam "run bootscript; " \ 13247c3e074SFabio Estevam "else " \ 13347c3e074SFabio Estevam "if run loaduimage; then " \ 13447c3e074SFabio Estevam "run mmcboot; " \ 13547c3e074SFabio Estevam "else run netboot; " \ 13647c3e074SFabio Estevam "fi; " \ 13747c3e074SFabio Estevam "fi; " \ 13847c3e074SFabio Estevam "else run netboot; fi" 13947c3e074SFabio Estevam #define CONFIG_ARP_TIMEOUT 200UL 14047c3e074SFabio Estevam 14147c3e074SFabio Estevam /* Miscellaneous configurable options */ 14247c3e074SFabio Estevam #define CONFIG_SYS_LONGHELP /* undef to save memory */ 14347c3e074SFabio Estevam #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 14447c3e074SFabio Estevam #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 14547c3e074SFabio Estevam #define CONFIG_SYS_PROMPT "MX53ARD U-Boot > " 14647c3e074SFabio Estevam #define CONFIG_AUTO_COMPLETE 14747c3e074SFabio Estevam #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 14847c3e074SFabio Estevam 14947c3e074SFabio Estevam /* Print Buffer Size */ 15047c3e074SFabio Estevam #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 15147c3e074SFabio Estevam #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 15247c3e074SFabio Estevam #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 15347c3e074SFabio Estevam 15447c3e074SFabio Estevam #define CONFIG_SYS_MEMTEST_START 0x70000000 15547c3e074SFabio Estevam #define CONFIG_SYS_MEMTEST_END 0x70010000 15647c3e074SFabio Estevam 15747c3e074SFabio Estevam #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 15847c3e074SFabio Estevam 15947c3e074SFabio Estevam #define CONFIG_SYS_HZ 1000 16047c3e074SFabio Estevam #define CONFIG_CMDLINE_EDITING 16147c3e074SFabio Estevam 16247c3e074SFabio Estevam /* Stack sizes */ 16347c3e074SFabio Estevam #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 16447c3e074SFabio Estevam 16547c3e074SFabio Estevam /* Physical Memory Map */ 16647c3e074SFabio Estevam #define CONFIG_NR_DRAM_BANKS 2 16747c3e074SFabio Estevam #define PHYS_SDRAM_1 CSD0_BASE_ADDR 16847c3e074SFabio Estevam #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 16947c3e074SFabio Estevam #define PHYS_SDRAM_2 CSD1_BASE_ADDR 17047c3e074SFabio Estevam #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024) 17147c3e074SFabio Estevam #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE) 17247c3e074SFabio Estevam 17347c3e074SFabio Estevam #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 17447c3e074SFabio Estevam #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 17547c3e074SFabio Estevam #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 17647c3e074SFabio Estevam 17747c3e074SFabio Estevam #define CONFIG_SYS_INIT_SP_OFFSET \ 17847c3e074SFabio Estevam (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 17947c3e074SFabio Estevam #define CONFIG_SYS_INIT_SP_ADDR \ 18047c3e074SFabio Estevam (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 18147c3e074SFabio Estevam 18247c3e074SFabio Estevam /* FLASH and environment organization */ 18347c3e074SFabio Estevam #define CONFIG_SYS_NO_FLASH 18447c3e074SFabio Estevam 18547c3e074SFabio Estevam #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 18647c3e074SFabio Estevam #define CONFIG_ENV_SIZE (8 * 1024) 18747c3e074SFabio Estevam #define CONFIG_ENV_IS_IN_MMC 18847c3e074SFabio Estevam #define CONFIG_SYS_MMC_ENV_DEV 0 18947c3e074SFabio Estevam 19047c3e074SFabio Estevam #define CONFIG_OF_LIBFDT 19147c3e074SFabio Estevam 19247c3e074SFabio Estevam #define MX53ARD_CS1GCR1 (CSEN | DSZ(2)) 19347c3e074SFabio Estevam #define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22)) 19447c3e074SFabio Estevam #define MX53ARD_CS1RCR2 RBEN(2) 19547c3e074SFabio Estevam #define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22)) 19647c3e074SFabio Estevam 19747c3e074SFabio Estevam #endif /* __CONFIG_H */ 198