1 /* 2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 3 * 4 * (C) Copyright 2009 Freescale Semiconductor, Inc. 5 * 6 * Configuration settings for the MX51EVK Board 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 /* High Level Configuration Options */ 15 16 #define CONFIG_MX51 /* in a mx51 */ 17 18 #define CONFIG_SYS_FSL_CLK 19 #define CONFIG_SYS_TEXT_BASE 0x97800000 20 21 #include <asm/arch/imx-regs.h> 22 23 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 24 #define CONFIG_SETUP_MEMORY_TAGS 25 #define CONFIG_INITRD_TAG 26 #define CONFIG_REVISION_TAG 27 28 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE 29 /* 30 * Size of malloc() pool 31 */ 32 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 33 34 #define CONFIG_BOARD_LATE_INIT 35 36 /* 37 * Hardware drivers 38 */ 39 #define CONFIG_FSL_IIM 40 #define CONFIG_CMD_FUSE 41 42 #define CONFIG_MXC_UART 43 #define CONFIG_MXC_UART_BASE UART1_BASE 44 #define CONFIG_MXC_GPIO 45 46 /* 47 * SPI Configs 48 * */ 49 50 #define CONFIG_MXC_SPI 51 52 /* PMIC Controller */ 53 #define CONFIG_POWER 54 #define CONFIG_POWER_SPI 55 #define CONFIG_POWER_FSL 56 #define CONFIG_FSL_PMIC_BUS 0 57 #define CONFIG_FSL_PMIC_CS 0 58 #define CONFIG_FSL_PMIC_CLK 2500000 59 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) 60 #define CONFIG_FSL_PMIC_BITLEN 32 61 #define CONFIG_RTC_MC13XXX 62 63 /* 64 * MMC Configs 65 * */ 66 #define CONFIG_FSL_ESDHC 67 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR 68 #define CONFIG_SYS_FSL_ESDHC_NUM 2 69 70 #define CONFIG_MMC 71 72 #define CONFIG_GENERIC_MMC 73 #define CONFIG_DOS_PARTITION 74 75 /* 76 * Eth Configs 77 */ 78 #define CONFIG_MII 79 80 #define CONFIG_FEC_MXC 81 #define IMX_FEC_BASE FEC_BASE_ADDR 82 #define CONFIG_FEC_MXC_PHYADDR 0x1F 83 84 /* USB Configs */ 85 #define CONFIG_USB_EHCI 86 #define CONFIG_USB_EHCI_MX5 87 #define CONFIG_USB_HOST_ETHER 88 #define CONFIG_USB_ETHER_ASIX 89 #define CONFIG_USB_ETHER_SMSC95XX 90 #define CONFIG_MXC_USB_PORT 1 91 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI 92 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED 93 94 /* Framebuffer and LCD */ 95 #define CONFIG_PREBOOT 96 #define CONFIG_VIDEO_IPUV3 97 #define CONFIG_VIDEO_BMP_RLE8 98 #define CONFIG_SPLASH_SCREEN 99 #define CONFIG_BMP_16BPP 100 #define CONFIG_VIDEO_LOGO 101 #define CONFIG_IPUV3_CLK 133000000 102 103 /* allow to overwrite serial and ethaddr */ 104 #define CONFIG_ENV_OVERWRITE 105 #define CONFIG_CONS_INDEX 1 106 #define CONFIG_BAUDRATE 115200 107 108 /*********************************************************** 109 * Command definition 110 ***********************************************************/ 111 112 #define CONFIG_CMD_DATE 113 114 115 #define CONFIG_ETHPRIME "FEC0" 116 117 #define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */ 118 119 #define CONFIG_EXTRA_ENV_SETTINGS \ 120 "script=boot.scr\0" \ 121 "image=zImage\0" \ 122 "fdt_file=imx51-babbage.dtb\0" \ 123 "fdt_addr=0x91000000\0" \ 124 "boot_fdt=try\0" \ 125 "ip_dyn=yes\0" \ 126 "mmcdev=0\0" \ 127 "mmcpart=1\0" \ 128 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 129 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 130 "root=${mmcroot}\0" \ 131 "loadbootscript=" \ 132 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 133 "bootscript=echo Running bootscript from mmc ...; " \ 134 "source\0" \ 135 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 136 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 137 "mmcboot=echo Booting from mmc ...; " \ 138 "run mmcargs; " \ 139 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 140 "if run loadfdt; then " \ 141 "bootz ${loadaddr} - ${fdt_addr}; " \ 142 "else " \ 143 "if test ${boot_fdt} = try; then " \ 144 "bootz; " \ 145 "else " \ 146 "echo WARN: Cannot load the DT; " \ 147 "fi; " \ 148 "fi; " \ 149 "else " \ 150 "bootz; " \ 151 "fi;\0" \ 152 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 153 "root=/dev/nfs " \ 154 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 155 "netboot=echo Booting from net ...; " \ 156 "run netargs; " \ 157 "if test ${ip_dyn} = yes; then " \ 158 "setenv get_cmd dhcp; " \ 159 "else " \ 160 "setenv get_cmd tftp; " \ 161 "fi; " \ 162 "${get_cmd} ${image}; " \ 163 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 164 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 165 "bootz ${loadaddr} - ${fdt_addr}; " \ 166 "else " \ 167 "if test ${boot_fdt} = try; then " \ 168 "bootz; " \ 169 "else " \ 170 "echo ERROR: Cannot load the DT; " \ 171 "exit; " \ 172 "fi; " \ 173 "fi; " \ 174 "else " \ 175 "bootz; " \ 176 "fi;\0" 177 178 #define CONFIG_BOOTCOMMAND \ 179 "mmc dev ${mmcdev}; if mmc rescan; then " \ 180 "if run loadbootscript; then " \ 181 "run bootscript; " \ 182 "else " \ 183 "if run loadimage; then " \ 184 "run mmcboot; " \ 185 "else run netboot; " \ 186 "fi; " \ 187 "fi; " \ 188 "else run netboot; fi" 189 190 #define CONFIG_ARP_TIMEOUT 200UL 191 192 /* 193 * Miscellaneous configurable options 194 */ 195 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 196 #define CONFIG_AUTO_COMPLETE 197 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 198 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 199 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 200 201 #define CONFIG_SYS_MEMTEST_START 0x90000000 202 #define CONFIG_SYS_MEMTEST_END 0x90010000 203 204 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 205 206 #define CONFIG_CMDLINE_EDITING 207 208 /*----------------------------------------------------------------------- 209 * Physical Memory Map 210 */ 211 #define CONFIG_NR_DRAM_BANKS 1 212 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 213 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 214 215 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 216 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 217 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 218 219 #define CONFIG_BOARD_EARLY_INIT_F 220 221 #define CONFIG_SYS_INIT_SP_OFFSET \ 222 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 223 #define CONFIG_SYS_INIT_SP_ADDR \ 224 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 225 226 #define CONFIG_SYS_DDR_CLKSEL 0 227 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 228 #define CONFIG_SYS_MAIN_PWR_ON 229 230 /*----------------------------------------------------------------------- 231 * FLASH and environment organization 232 */ 233 #define CONFIG_SYS_NO_FLASH 234 235 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 236 #define CONFIG_ENV_SIZE (8 * 1024) 237 #define CONFIG_ENV_IS_IN_MMC 238 #define CONFIG_SYS_MMC_ENV_DEV 0 239 240 #endif 241